spinal.core

PhaseVerilog

Related Doc: package core

class PhaseVerilog extends PhaseMisc with VerilogBase

Created by PIC32F_USER on 05/06/2016.

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  1. PhaseVerilog
  2. VerilogBase
  3. VhdlVerilogBase
  4. PhaseMisc
  5. Phase
  6. AnyRef
  7. Any
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Instance Constructors

  1. new PhaseVerilog(pc: PhaseContext)

Type Members

  1. class Process extends AnyRef

    Definition Classes
    VhdlVerilogBase

Value Members

  1. final def !=(arg0: Any): Boolean

    Definition Classes
    AnyRef → Any
  2. final def ##(): Int

    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean

    Definition Classes
    AnyRef → Any
  4. final def asInstanceOf[T0]: T0

    Definition Classes
    Any
  5. def clone(): AnyRef

    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  6. def compile(component: Component): Unit

  7. def emit(component: Component): String

  8. def emitAssignement(to: Node, from: Node, ret: StringBuilder, tab: String, assignementKind: String): Unit

  9. def emitAssignementLevel(context: AssignementLevel, ret: StringBuilder, tab: String, assignementKind: String, isElseIf: Boolean = false, hiddenSensitivity: Set[Node] = null): Unit

  10. def emitAsyncronous(component: Component, ret: StringBuilder, funcRet: StringBuilder): Unit

  11. def emitClockEdge(clock: Bool, edgeKind: EdgeKind): String

    Definition Classes
    VerilogBase
  12. def emitCommentAttributes(attributes: Iterable[Attribute]): String

  13. def emitComponentInstances(component: Component, ret: StringBuilder): Unit

  14. def emitDataType(node: Node): String

    Definition Classes
    VerilogBase
  15. def emitDebug(component: Component, ret: StringBuilder, enumDebugSignals: ArrayBuffer[SpinalEnumCraft[_]]): Unit

  16. def emitDirection(baseType: BaseType): String

    Definition Classes
    VerilogBase
  17. def emitEnumLiteral[T <: SpinalEnum](enum: SpinalEnumElement[T], encoding: SpinalEnumEncoding, prefix: String = "`"): String

    Definition Classes
    VerilogBase
  18. def emitEnumPackage(out: FileWriter): Unit

  19. def emitEnumType(enum: SpinalEnum, encoding: SpinalEnumEncoding, prefix: String = "`"): String

    Definition Classes
    VerilogBase
  20. def emitEnumType[T <: SpinalEnum](enum: SpinalEnumCraft[T], prefix: String): String

    Definition Classes
    VerilogBase
  21. def emitFunctions(component: Component, ret: StringBuilder): Unit

  22. def emitLogic(node: Node): String

  23. def emitModuleContent(component: Component, builder: ComponentBuilder): Unit

  24. def emitModuleIo(component: Component, builder: ComponentBuilder): Unit

  25. def emitRange(node: Widthable): String

    Definition Classes
    VerilogBase
  26. def emitReference(node: Node): String

    Definition Classes
    VerilogBase
  27. def emitResetEdge(reset: Bool, polarity: Polarity): String

    Definition Classes
    VerilogBase
  28. def emitSignal(ref: Node, typeNode: Node): String

    Definition Classes
    VerilogBase
  29. def emitSignals(component: Component, ret: StringBuilder, enumDebugSignals: ArrayBuffer[SpinalEnumCraft[_]]): Unit

  30. def emitSyncronous(component: Component, ret: StringBuilder): Unit

  31. def emitSyntaxAttributes(attributes: Iterable[Attribute]): String

  32. val emitedComponent: Map[ComponentBuilder, ComponentBuilder]

  33. val emitedComponentRef: Map[Component, Component]

  34. def enumEgualsImpl(eguals: Boolean)(op: Modifier): String

  35. final def eq(arg0: AnyRef): Boolean

    Definition Classes
    AnyRef
  36. def equals(arg0: Any): Boolean

    Definition Classes
    AnyRef → Any
  37. def extractBitVectorFixed(func: Modifier): String

  38. def extractBitVectorFloating(func: Modifier): String

  39. def extractBoolFixed(func: Modifier): String

  40. def extractBoolFloating(func: Modifier): String

  41. def finalize(): Unit

    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )
  42. def getAsyncProcesses(component: Component, merge: Boolean = true): Seq[Process]

    Definition Classes
    VhdlVerilogBase
  43. def getBaseTypeSignalInitialisation(signal: BaseType): String

  44. final def getClass(): Class[_]

    Definition Classes
    AnyRef → Any
  45. def getEnumDebugType(spinalEnum: SpinalEnum): String

  46. def getEnumToDebugFuntion(spinalEnum: SpinalEnum, source: SpinalEnumEncoding): String

  47. def getReEncodingFuntion(spinalEnum: SpinalEnum, source: SpinalEnumEncoding, target: SpinalEnumEncoding): String

  48. def getSensitivity(nodes: Iterable[Node], includeNodes: Boolean): Set[Node]

    Definition Classes
    VhdlVerilogBase
  49. def hasNetlistImpact: Boolean

    Definition Classes
    PhaseMiscPhase
  50. def hashCode(): Int

    Definition Classes
    AnyRef → Any
  51. def impl(pc: PhaseContext): Unit

    Definition Classes
    PhaseVerilogPhase
  52. final def isInstanceOf[T0]: Boolean

    Definition Classes
    Any
  53. def isReferenceable(node: Node): Boolean

    Definition Classes
    VhdlVerilogBase
  54. var memBitsMaskKind: MemBitsMaskKind

  55. val modifierImplMap: Map[String, (Modifier) ⇒ String]

  56. final def ne(arg0: AnyRef): Boolean

    Definition Classes
    AnyRef
  57. final def notify(): Unit

    Definition Classes
    AnyRef
  58. final def notifyAll(): Unit

    Definition Classes
    AnyRef
  59. def operatorImplAsBinaryOperator(vhd: String)(op: Modifier): String

  60. def operatorImplAsBinaryOperatorLeftSigned(vhd: String)(op: Modifier): String

  61. def operatorImplAsBinaryOperatorSigned(vhd: String)(op: Modifier): String

  62. def operatorImplAsCat(op: Modifier): String

  63. def operatorImplAsEnumToEnum(func: Modifier): String

  64. def operatorImplAsFunction(vhd: String)(func: Modifier): String

  65. def operatorImplAsMux(func: Modifier): String

  66. def operatorImplAsNoTransformation(func: Modifier): String

  67. def operatorImplAsSigned(func: Modifier): String

  68. def operatorImplAsUnaryOperator(vhd: String)(op: Modifier): String

  69. var outFile: FileWriter

  70. def shiftLeftByIntFixedWidthImpl(func: Modifier): String

  71. def shiftLeftByIntImpl(func: Modifier): String

  72. def shiftRightByIntFixedWidthImpl(func: Modifier): String

  73. def shiftRightByIntImpl(func: Modifier): String

  74. def shiftRightSignedByIntFixedWidthImpl(func: Modifier): String

  75. def signalNeedProcess(baseType: BaseType): Boolean

  76. final def synchronized[T0](arg0: ⇒ T0): T0

    Definition Classes
    AnyRef
  77. def toSpinalEnumCraft[T <: SpinalEnum](that: Any): SpinalEnumCraft[T]

  78. def toString(): String

    Definition Classes
    AnyRef → Any
  79. def unaryAllBy(func: Modifier): String

  80. def unimplementedModifier(message: String)(op: Modifier): String

  81. def useNodeConsumers: Boolean

    Definition Classes
    PhaseVerilogPhase
  82. final def wait(): Unit

    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  83. final def wait(arg0: Long, arg1: Int): Unit

    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  84. final def wait(arg0: Long): Unit

    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

Inherited from VerilogBase

Inherited from VhdlVerilogBase

Inherited from PhaseMisc

Inherited from Phase

Inherited from AnyRef

Inherited from Any

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