spinal.core

VhdlBase

Related Doc: package core

trait VhdlBase extends VhdlVerilogBase

Created by PIC18F on 07.01.2015.

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VhdlVerilogBase, AnyRef, Any
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  2. VhdlVerilogBase
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Type Members

  1. class Process extends AnyRef

    Definition Classes
    VhdlVerilogBase

Value Members

  1. final def !=(arg0: Any): Boolean

    Definition Classes
    AnyRef → Any
  2. final def ##(): Int

    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean

    Definition Classes
    AnyRef → Any
  4. final def asInstanceOf[T0]: T0

    Definition Classes
    Any
  5. def clone(): AnyRef

    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  6. def emitClockEdge(clock: Bool, edgeKind: EdgeKind): String

  7. def emitDataType(node: Node, constrained: Boolean = true): String

  8. def emitDirection(baseType: BaseType): String

  9. def emitEnumLiteral[T <: SpinalEnum](enum: SpinalEnumElement[T], encoding: SpinalEnumEncoding): String

  10. def emitEnumType(enum: SpinalEnum, encoding: SpinalEnumEncoding): String

  11. def emitEnumType[T <: SpinalEnum](enum: SpinalEnumCraft[T]): String

  12. def emitLibrary(ret: StringBuilder): Unit

  13. def emitRange(node: Widthable): String

  14. def emitReference(node: Node): String

  15. def emitSignal(ref: Node, typeNode: Node): String

  16. var enumPackageName: String

  17. final def eq(arg0: AnyRef): Boolean

    Definition Classes
    AnyRef
  18. def equals(arg0: Any): Boolean

    Definition Classes
    AnyRef → Any
  19. def finalize(): Unit

    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )
  20. def getAsyncProcesses(component: Component, merge: Boolean = true): Seq[Process]

    Definition Classes
    VhdlVerilogBase
  21. final def getClass(): Class[_]

    Definition Classes
    AnyRef → Any
  22. def getSensitivity(nodes: Iterable[Node], includeNodes: Boolean): Set[Node]

    Definition Classes
    VhdlVerilogBase
  23. def hashCode(): Int

    Definition Classes
    AnyRef → Any
  24. final def isInstanceOf[T0]: Boolean

    Definition Classes
    Any
  25. def isReferenceable(node: Node): Boolean

    Definition Classes
    VhdlVerilogBase
  26. final def ne(arg0: AnyRef): Boolean

    Definition Classes
    AnyRef
  27. final def notify(): Unit

    Definition Classes
    AnyRef
  28. final def notifyAll(): Unit

    Definition Classes
    AnyRef
  29. var packageName: String

  30. final def synchronized[T0](arg0: ⇒ T0): T0

    Definition Classes
    AnyRef
  31. def toString(): String

    Definition Classes
    AnyRef → Any
  32. final def wait(): Unit

    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  33. final def wait(arg0: Long, arg1: Int): Unit

    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  34. final def wait(arg0: Long): Unit

    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

Inherited from VhdlVerilogBase

Inherited from AnyRef

Inherited from Any

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