~~!==~~

~~SpinalEnumCraft~~

##

Bits Data

#=

BitVectorPimper BoolPimper EnumPimper

%

BitCount HertzNumber Num PhysicalNumber SInt TimeNumber UInt

&

Bits BitwiseOp Bool SInt UInt

&&

Bool

*

BitCount HertzNumber Num PhysicalNumber SFix SInt TimeNumber UFix UInt

+

BitCount HertzNumber Num PhysicalNumber SFix SInt TimeNumber UFix UInt AssignedBits

-

BitCount HertzNumber Num PhysicalNumber SFix SInt TimeNumber UFix UInt

/

BitCount HertzNumber Num PhysicalNumber SInt TimeNumber UInt

:=

Bits DataPrimitives SFix SInt SpinalEnumCraft UFix UInt

<

Num SFix SInt UFix UInt

<<

Bits Num SFix SInt UFix UInt

<<|

SFix UFix

<=

Num SFix SInt UFix UInt

<>

DataPrimitives

=/=

BitVector Bool DataPrimitives MaskedBoolean MaskedLiteral SpinalEnumCraft SpinalEnumElement

===

BitVector Bool DataPrimitives MaskedBoolean MaskedLiteral SpinalEnumCraft SpinalEnumElement

>

Num SFix SInt UFix UInt

>=

Num SFix SInt UFix UInt

>>

Bits Num SFix SInt UFix UInt

>>|

SFix UFix

?

Bool

@@

SInt UInt

\

DataPrimitives

^

Bits BitwiseOp Bool SInt UInt

_data

DataPimper UInt

_optimisationLevel

SimConfig

_referenceSet

ComponentEmiterVerilog ComponentEmiterVhdl

_referenceSetEnabled

ComponentEmiterVerilog ComponentEmiterVhdl

_rtlGen

SimConfig

_spinalConfig

SimConfig

_spinalReport

SimConfig

_spinalTags

SpinalTagReady

_waveDepth

SimConfig

_widths

Mem

_withWave

SimConfig

|

Bits BitwiseOp Bool MuxBuilder MuxBuilderEnum SInt UInt

|<<

Bits SInt UInt

|>>

Bits SInt UInt

||

Bool