spinal.core
Blackbox every memory which use write port with byte mask.
Useful because synthesis tool don't support an unified way to infer byte mask in verilog/VHDL. Throw an error on unblackboxable memory.
RAM/ROM Blackboxing policy documentation
(Since version ) see corresponding Javadoc for more information.
Blackbox every memory which use write port with byte mask.
Useful because synthesis tool don't support an unified way to infer byte mask in verilog/VHDL. Throw an error on unblackboxable memory.
RAM/ROM Blackboxing policy documentation