Package

spinal.core

sim

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package sim

Simulation package

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Type Members

  1. implicit class SimBaseTypePimper extends AnyRef

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    Add implicit function to BaseType for simulation

  2. implicit class SimBitVectorPimper extends AnyRef

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    Add implicit function to BitVector

  3. implicit class SimBitsPimper extends AnyRef

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    Add implicit function to Bits

  4. implicit class SimBoolPimper extends AnyRef

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    Add implicit function to Bool

  5. implicit class SimClockDomainPimper extends AnyRef

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    Add implicit function to ClockDomain

  6. class SimCompiled[T <: Component] extends AnyRef

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    Run simulation

  7. case class SimConfigLegacy[T <: Component](_rtlGen: Option[() ⇒ T] = None, _spinalConfig: SpinalConfig = SpinalConfig(), _spinalReport: Option[SpinalReport[T]] = None) extends Product with Serializable

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    Legacy simulation configuration

  8. implicit class SimDataPimper[T <: Data] extends AnyRef

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    Add implicit function to Data

  9. implicit class SimEnumPimper[T <: SpinalEnum] extends AnyRef

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    Add implicit function to Enum

  10. implicit class SimSIntPimper extends AnyRef

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    Add implicit function to SInt

  11. implicit class SimUIntPimper extends AnyRef

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    Add implicit function to UInt

  12. case class SpinalSimConfig(_workspacePath: String = ..., _workspaceName: String = null, _waveDepth: Int = 0, _spinalConfig: SpinalConfig = SpinalConfig(), _optimisationLevel: Int = 0, _simulatorFlags: ArrayBuffer[String] = ArrayBuffer[String](), _additionalRtlPath: ArrayBuffer[String] = ArrayBuffer[String](), _waveFormat: WaveFormat = WaveFormat.NONE) extends Product with Serializable

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    SpinalSim configuration

  13. case class SpinalVerilatorBackendConfig[T <: Component](rtl: SpinalReport[T], waveFormat: WaveFormat = WaveFormat.NONE, workspacePath: String = "./", workspaceName: String = null, vcdPath: String = null, vcdPrefix: String = null, waveDepth: Int = 0, optimisationLevel: Int = 2, simulatorFlags: ArrayBuffer[String] = ArrayBuffer[String]()) extends Product with Serializable

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    Backend configuration for verilator

  14. class SwapTagPhase extends PhaseNetlist

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    Swap all oldTag with newTag

  15. type suspendable = sim.suspendable

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Value Members

  1. object DoClock

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    Generate a clock

  2. object DoReset

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    Execute a reset sequence

  3. object ForkClock

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    Fork the DoClock

  4. def SimConfig: SpinalSimConfig

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  5. object SimPublic extends SpinalTag

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    Tag SimPublic

  6. object SimSpeedPrinter

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    Print the simulation speed

  7. object SimStatics

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  8. object SimTimeout

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    Create a Timeout for the simulation

  9. object SimWorkspace

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    Simulation Workspace

  10. object SpinalVerilatorBackend

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    Backend verilator

  11. object SpinalVerilatorSim

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  12. def delayed(delay: Long)(body: ⇒ Unit): Unit

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  13. def disableSimWave(): Unit

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  14. def enableSimWave(): Unit

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  15. def fork(body: ⇒ Unit): SimThread

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    Fork

  16. def forkJoin(bodys: () ⇒ Unit*): Unit

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  17. def forkSensitive(block: ⇒ Unit): Unit

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  18. def forkSensitiveWhile(block: ⇒ Boolean): Unit

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  19. def setBigInt(bt: BaseType, value: BigInt): Unit

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    Set a BigInt value to a BaseType

  20. def setLong(bt: BaseType, value: Long): Unit

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    Set a long value to a BaseType

  21. def simDeltaCycle(): Long

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  22. def simFailure(message: String = ""): Unit

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  23. def simSuccess(): Unit

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    Success/Failure simulation

  24. def simTime(): Long

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    Return the current simulation time

  25. def sleep(cycles: Long): Unit

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    Sleep / WaitUntil

  26. def waitUntil(cond: ⇒ Boolean): Unit

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Deprecated Value Members

  1. def SimConfig[T <: Component](rtl: SpinalReport[T]): SimConfigLegacy[T]

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    Annotations
    @deprecated
    Deprecated

    (Since version ???) Use SimConfig.???.compile(new Dut) instead

  2. def SimConfig[T <: Component](rtl: ⇒ T): SimConfigLegacy[T]

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    Annotations
    @deprecated
    Deprecated

    (Since version ???) Use SimConfig.???.compile(new Dut) instead

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