spinal.lib.cpu.riscv.impl

RiscvCore

Related Docs: object RiscvCore | package impl

class RiscvCore extends Component

Linear Supertypes
Component, SpinalTagReady, Stackable, DelayedInit, NameableByComponent, Nameable, ContextUser, ScalaLocated, GlobalDataUser, OwnableRef, AnyRef, Any
Ordering
  1. Alphabetic
  2. By inheritance
Inherited
  1. RiscvCore
  2. Component
  3. SpinalTagReady
  4. Stackable
  5. DelayedInit
  6. NameableByComponent
  7. Nameable
  8. ContextUser
  9. ScalaLocated
  10. GlobalDataUser
  11. OwnableRef
  12. AnyRef
  13. Any
  1. Hide All
  2. Show all
Learn more about member selection
Visibility
  1. Public
  2. All

Instance Constructors

  1. new RiscvCore()(implicit c: RiscvCoreConfig)

Type Members

  1. case class PrePopTask extends Product with Serializable

    Definition Classes
    Component
  2. type RefOwnerType = Component

    Definition Classes
    Component → OwnableRef

Value Members

  1. final def !=(arg0: Any): Boolean

    Definition Classes
    AnyRef → Any
  2. final def ##(): Int

    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean

    Definition Classes
    AnyRef → Any
  4. var _spinalTags: Set[SpinalTag]

    Definition Classes
    SpinalTagReady
  5. def addAttribute(attribute: Attribute): RiscvCore.this.type

    Definition Classes
    Component → SpinalTagReady
  6. def addAttribute(name: String, value: String): RiscvCore.this.type

    Definition Classes
    SpinalTagReady
  7. def addAttribute(name: String): RiscvCore.this.type

    Definition Classes
    SpinalTagReady
  8. def addPrePopTask(task: () ⇒ Unit): ArrayBuffer[PrePopTask]

    Definition Classes
    Component
  9. def addTag(spinalTag: SpinalTag): RiscvCore.this.type

    Definition Classes
    SpinalTagReady
  10. def addTags(tags: Iterable[SpinalTag]): RiscvCore.this.type

    Definition Classes
    SpinalTagReady
  11. lazy val applyExtensionTags: Unit

  12. final def asInstanceOf[T0]: T0

    Definition Classes
    Any
  13. val branchArbiter: Area

  14. val brancheCache: Mem[BranchPredictorLine]

  15. implicit val c: RiscvCoreConfig

  16. val children: ArrayBuffer[Component]

    Definition Classes
    Component
  17. val clockDomain: ClockDomain

    Definition Classes
    Component
  18. def clone(): AnyRef

    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  19. def component: Component

    Definition Classes
    ContextUser
  20. val dCmd: Stream[CoreDataCmd]

  21. val dRsp: Stream[Bits]

  22. val dataBusKind: DataBusKind

  23. val decode: Area { ... /* 23 definitions in type refinement */ }

  24. var definitionName: String

    Definition Classes
    Component
  25. def delayedInit(body: ⇒ Unit): Unit

    Definition Classes
    Component → DelayedInit
  26. val dslBody: ScopeStatement

    Definition Classes
    Component
  27. final def eq(arg0: AnyRef): Boolean

    Definition Classes
    AnyRef
  28. def equals(arg0: Any): Boolean

    Definition Classes
    AnyRef → Any
  29. val execute0: Area { ... /* 11 definitions in type refinement */ }

  30. val execute1: Area { ... /* 9 definitions in type refinement */ }

  31. def existsTag(cond: (SpinalTag) ⇒ Boolean): Boolean

    Definition Classes
    SpinalTagReady
  32. val fetch: Area { ... /* 6 definitions in type refinement */ }

  33. def filterTag(cond: (SpinalTag) ⇒ Boolean): Iterable[SpinalTag]

    Definition Classes
    SpinalTagReady
  34. def finalize(): Unit

    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )
  35. def findTag(cond: (SpinalTag) ⇒ Boolean): Option[SpinalTag]

    Definition Classes
    SpinalTagReady
  36. def foreachReflectableNameables(doThat: (Any) ⇒ Unit): Unit

    Definition Classes
    Nameable
  37. def getAllIo: Set[BaseType]

    Definition Classes
    Component
  38. final def getClass(): Class[_]

    Definition Classes
    AnyRef → Any
  39. def getDisplayName(): String

    Definition Classes
    Component → Nameable
  40. def getGroupedIO(ioBundleBypass: Boolean): Seq[Data]

    Definition Classes
    Component
  41. def getInstanceCounter: Int

    Definition Classes
    ContextUser
  42. def getInstructionCtrl(instruction: Bits): InstructionCtrl

  43. def getName(): String

    Definition Classes
    NameableByComponent → Nameable
  44. def getName(default: String): String

    Definition Classes
    Nameable
  45. def getOrdredNodeIo: List[BaseType]

    Definition Classes
    Component
  46. def getParentsPath(sep: String): String

    Definition Classes
    Component
  47. def getPath(sep: String): String

    Definition Classes
    Component
  48. def getRefOwnersChain(): List[Any]

    Definition Classes
    OwnableRef
  49. def getScalaLocationLong: String

    Definition Classes
    ScalaLocated
  50. def getScalaLocationShort: String

    Definition Classes
    ScalaLocated
  51. def getScalaTrace(): Throwable

    Definition Classes
    ContextUser → ScalaLocated
  52. def getTag[T <: SpinalTag](clazz: Class[T]): Option[T]

    Definition Classes
    SpinalTagReady
  53. val globalData: GlobalData

    Definition Classes
    GlobalDataUser
  54. def hasTag(spinalTag: SpinalTag): Boolean

    Definition Classes
    SpinalTagReady
  55. def hashCode(): Int

    Definition Classes
    AnyRef → Any
  56. val hazardTracker: Area { ... /* 6 definitions in type refinement */ }

  57. val iCmd: Stream[CoreInstructionCmd]

  58. val iRsp: Stream[CoreInstructionRsp]

  59. def instanceAttributes(language: Language): Iterable[Attribute]

    Definition Classes
    SpinalTagReady
  60. def instanceAttributes: Iterable[Attribute]

    Definition Classes
    SpinalTagReady
  61. val irqExceptionMask: Int

  62. val irqUsages: HashMap[Int, IrqUsage]

  63. val irqWidth: Int

  64. def isEmptyOfTag: Boolean

    Definition Classes
    SpinalTagReady
  65. final def isInstanceOf[T0]: Boolean

    Definition Classes
    Any
  66. def isNamed: Boolean

    Definition Classes
    Nameable
  67. def isUnnamed: Boolean

    Definition Classes
    Nameable
  68. var localNamingScope: NamingScope

    Definition Classes
    Component
  69. def nameElements(): Unit

    Definition Classes
    Component
  70. final def ne(arg0: AnyRef): Boolean

    Definition Classes
    AnyRef
  71. val noDataRspStallLogic: Any

  72. def noIoPrefix(): RiscvCore.this.type

    Definition Classes
    Component
  73. final def notify(): Unit

    Definition Classes
    AnyRef
  74. final def notifyAll(): Unit

    Definition Classes
    AnyRef
  75. def onEachAttributes(doIt: (Attribute) ⇒ Unit): Unit

    Definition Classes
    SpinalTagReady
  76. def parent: Component

    Definition Classes
    Component
  77. var parentScope: ScopeStatement

    Definition Classes
    ContextUser
  78. def parents(of: Component, list: List[Component]): List[Component]

    Definition Classes
    Component
  79. val performanceCounters: Area { ... /* 6 definitions in type refinement */ }

  80. def postPopEvent(): Unit

    Definition Classes
    Stackable
  81. def postPushEvent(): Unit

    Definition Classes
    Component → Stackable
  82. def prePop(): Unit

    Definition Classes
    Component
  83. def prePopEvent(): Unit

    Definition Classes
    Component → Stackable
  84. val prefetch: Area { ... /* 6 definitions in type refinement */ }

  85. var pulledDataCache: Map[Data, Data]

    Definition Classes
    Component
  86. var refOwner: RefOwnerType

    Definition Classes
    OwnableRef
  87. val regFile: Mem[Bits]

  88. def removeTag(spinalTag: SpinalTag): RiscvCore.this.type

    Definition Classes
    SpinalTagReady
  89. def removeTags(tags: Iterable[SpinalTag]): RiscvCore.this.type

    Definition Classes
    SpinalTagReady
  90. def rework[T](gen: ⇒ T): T

    Definition Classes
    Component
  91. def setCompositeName(nameable: Nameable, postfix: String, weak: Boolean): RiscvCore.this.type

    Definition Classes
    Nameable
  92. def setCompositeName(nameable: Nameable, postfix: String): RiscvCore.this.type

    Definition Classes
    Nameable
  93. def setCompositeName(nameable: Nameable, weak: Boolean): RiscvCore.this.type

    Definition Classes
    Nameable
  94. def setCompositeName(nameable: Nameable): RiscvCore.this.type

    Definition Classes
    Nameable
  95. def setDefinitionName(name: String): RiscvCore.this.type

    Definition Classes
    Component
  96. def setName(name: String, weak: Boolean): RiscvCore.this.type

    Definition Classes
    Nameable
  97. def setPartialName(name: String, weak: Boolean): RiscvCore.this.type

    Definition Classes
    Nameable
  98. def setPartialName(owner: Nameable, name: String, weak: Boolean): RiscvCore.this.type

    Definition Classes
    Nameable
  99. def setPartialName(name: String): RiscvCore.this.type

    Definition Classes
    Nameable
  100. def setPartialName(owner: Nameable, name: String): RiscvCore.this.type

    Definition Classes
    Nameable
  101. def setRefOwner(that: Any): Unit

    Definition Classes
    OwnableRef
  102. def setScalaLocated(source: ScalaLocated): RiscvCore.this.type

    Definition Classes
    ScalaLocated
  103. def setWeakName(name: String): RiscvCore.this.type

    Definition Classes
    Nameable
  104. def spinalTags: Set[SpinalTag]

    Definition Classes
    SpinalTagReady
  105. final def synchronized[T0](arg0: ⇒ T0): T0

    Definition Classes
    AnyRef
  106. def toString(): String

    Definition Classes
    Nameable → AnyRef → Any
  107. def unsetName(): RiscvCore.this.type

    Definition Classes
    Nameable
  108. val userCache: Map[AnyRef, Map[AnyRef, AnyRef]]

    Definition Classes
    Component
  109. final def wait(): Unit

    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  110. final def wait(arg0: Long, arg1: Int): Unit

    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  111. final def wait(arg0: Long): Unit

    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  112. val writeBack: Area { ... /* 12 definitions in type refinement */ }

  113. val writeBackBuffer: Area { val inInst: spinal.lib.Stream[spinal.lib.cpu.riscv.impl.CoreWriteBack0Output] }

Inherited from Component

Inherited from SpinalTagReady

Inherited from Stackable

Inherited from DelayedInit

Inherited from NameableByComponent

Inherited from Nameable

Inherited from ContextUser

Inherited from ScalaLocated

Inherited from GlobalDataUser

Inherited from OwnableRef

Inherited from AnyRef

Inherited from Any

Ungrouped