Queue a master to be connected
Queue a master to be connected
a master wishbone device
a list of slaves device to connect the master with
Queue a master to be connected
Queue a master to be connected
a tuple of master wishbone device and a list of slaves device to connect the master with
interconnect.addMasters( dBus -> List(ram.io.buses(0), slowBus), iBus -> List(ram.io.buses(1), slowBus), slowBus-> List(peripherals.io.bus, flashXip.io.bus) )
add a slave to the intercon, and specify its address space
add a slave to the intercon, and specify its address space
the slave device
the address defined via spinal.lib.bus.misc.SizeMapping
add multiple slave to the intercon, and specify their address space
add multiple slave to the intercon, and specify their address space
interconnect.addSlaves( ram.io.buses(0) -> SizeMapping(0x00000, 64 KiB), ram.io.buses(1) -> SizeMapping(0x00000, 64 KiB), peripherals.io.bus -> SizeMapping(0x70000, 64 Byte), flashXip.io.bus -> SizeMapping(0x80000, 512 KiB), slowBus -> DefaultMapping )
Modify a connection
Modify a connection
the master where the conenction start
the slave that is connected to the master
interconnect.setConnector(dBus, slowBus){(m,s) =>
m.cmd.halfPipe() >> s.cmd
m.rsp << s.rsp
}
Modify a connection
Modify a connection
the bus