MemPimped

final def !=(arg0: Any): Boolean

final def ##(): Int

final def ==(arg0: Any): Boolean

final def asInstanceOf[T0]: T0

def clone(): AnyRef

final def eq(arg0: AnyRef): Boolean

def equals(arg0: Any): Boolean

def flowReadSync[T2 <: Data](cmd: Flow[UInt], linkedData: T2): Flow[ReadRetLinked[T, T2]]

def flowReadSync(cmd: Flow[UInt]): Flow[T]

def formalCount(cond: (T) ⇒ Bool): UInt

def formalCount(word: T): UInt

final def getClass(): Class[_]

def hashCode(): Int

final def isInstanceOf[T0]: Boolean

final def ne(arg0: AnyRef): Boolean

final def notify(): Unit

final def notifyAll(): Unit

def readAsyncPort(): MemReadPortAsync[T]

def readAsyncPortBySyncReadRevertedClk: MemReadPortAsync[T]

def readSyncPort(readUnderWrite: ReadUnderWritePolicy = dontCare, clockCrossing: Boolean = false): MemReadPort[T]

def readSyncPort: MemReadPort[T]

def readWriteSyncPort(maskWidth: Int = 1, readUnderWrite: ReadUnderWritePolicy = dontCare, clockCrossing: Boolean = false, duringWrite: DuringWritePolicy = dontCare): MemReadWritePort[T]

def streamReadSync(cmd: Stream[UInt], crossClock: Boolean): Stream[T]

def streamReadSync(cmd: Stream[UInt]): Stream[T]

def streamReadSync[T2 <: Data](cmd: Stream[UInt], linkedData: T2, crossClock: Boolean = false): Stream[ReadRetLinked[T, T2]]

def streamReadSyncMultiPort(cmd: Seq[Stream[UInt]], crossClock: Boolean = false): Vec[Stream[T]]

final def synchronized[T0](arg0: ⇒ T0): T0

def toString(): String

final def wait(arg0: Long, arg1: Int): Unit

final def wait(arg0: Long): Unit

final def wait(): Unit

def writePort(): Flow[MemWriteCmd[T]]

Create a write port of memory.

def writePortWithMask(maskWidth: Int): Flow[MemWriteCmdWithMask[T]]

Create a write port of memory with masking.

def finalize(): Unit