: BRAM bus
: Incr address (default + dataWidth / 4)
Configuration of the BusSlaveFactory
Configuration of the BusSlaveFactory
In this function you have to define the read/write logic thanks to element, elementsPerAddress and elementsPerRangeAddress This is the only thing with def busDataWidth that should be implement by class that extends BusSlaveFactoryDelay
In this function you have to define the read/write logic thanks to element, elementsPerAddress and elementsPerRangeAddress This is the only thing with def busDataWidth that should be implement by class that extends BusSlaveFactoryDelay
Return the data width of the bus
Return the data width of the bus
Create a writable Flow register of type dataType at address and placed at bitOffset in the word
Create a writable Flow register of type dataType at address and placed at bitOffset in the word
Create a read write register of type dataType at address and placed at bitOffset in the word
Create a read write register of type dataType at address and placed at bitOffset in the word
Create multi-words read register of type dataType
Create multi-words read register of type dataType
Create a read only register of type dataType at address and placed at bitOffset in the word
Create a read only register of type dataType at address and placed at bitOffset in the word
Create multi-words write and read register of type dataType
Create multi-words write and read register of type dataType
Create multi-words write register of type dataType
Create multi-words write register of type dataType
Create a write only register of type dataType at address and placed at bitOffset in the word
Create a write only register of type dataType at address and placed at bitOffset in the word
Instantiate an internal register which at each cycle do : reg := reg | that Then when a read occur, the register is cleared.
Instantiate an internal register which at each cycle do : reg := reg | that Then when a read occur, the register is cleared. This register is readable at address and placed at bitOffset in the word
Drive that with a register writable at address placed at bitOffset in the word
Drive that with a register writable at address placed at bitOffset in the word
Drive that with a register writable and readable at address placed at bitOffset in the word
Drive that with a register writable and readable at address placed at bitOffset in the word
Drive and read that on multi-word
Drive and read that on multi-word
Emit on that a transaction when a write happen at address by using data placed at bitOffset in the word
Emit on that a transaction when a write happen at address by using data placed at bitOffset in the word
Drive that on multi-words
Drive that on multi-words
Contains all elements created
Contains all elements created
Contains all elements related to an address
Contains all elements related to an address
Return true if the bus is reading
Return true if the bus is reading
Return true if the bus is writing
Return true if the bus is writing
Permanently assign that by the bus write data from bitOffset
Permanently assign that by the bus write data from bitOffset
Call doThat when a read transaction occurs on address
Call doThat when a read transaction occurs on address
Call doThat when a write transaction occurs on address
Call doThat when a write transaction occurs on address
When the bus read the address, fill the response with that at bitOffset
When the bus read the address, fill the response with that at bitOffset
Make that readable and writable at address and placed at bitOffset in the word
Make that readable and writable at address and placed at bitOffset in the word
Create the memory mapping to write/read that from address
Create the memory mapping to write/read that from address
Create the memory mapping to read that
from address
If that
is bigger than one word it extends the register on following addresses.
Create the memory mapping to read that
from address
If that
is bigger than one word it extends the register on following addresses.
Read that and consume the transaction when a read happen at address.
Read that and consume the transaction when a read happen at address.
Read that (that is bigger than the busWidth) and consume the transaction when a read happen at address.
Read that (that is bigger than the busWidth) and consume the transaction when a read happen at address.
in order to avoid to read wrong data read first the address which contains the valid signal. Little : payload - valid at address 0x00 Big : valid - payload at address 0x00 Once the valid signal is true you can read all registers
Memory map a Mem to bus for reading.
Memory map a Mem to bus for reading. Elements can be larger than bus data width in bits.
Set the endianness during write/read multiword
Set the endianness during write/read multiword
Address incrementation used by the read and write multi words registers
Address incrementation used by the read and write multi words registers
When the bus write the address, assign that with bus’s data from bitOffset
When the bus write the address, assign that with bus’s data from bitOffset
Byte enable bits, defaulting to all ones
Byte enable bits, defaulting to all ones
Memory map a Mem to bus for writing.
Memory map a Mem to bus for writing. Elements can be larger than bus data width in bits.
Create the memory mapping to write that at address.
Create the memory mapping to write that at address.
If that
is bigger than one word it extends the register on following addresses.
(Since version ???) Use createReadAndWrite instead
(Since version ) see corresponding Javadoc for more information.
BRAM bus slave factory