Generate a pipe for a Valid interface
Generate a one-stage pipe from an explicit valid bit and some data
Generate a one-stage pipe from an explicit valid bit and some data
the valid bit (must be a hardware type)
the data (must be a hardware type)
the Valid output of the final pipeline stage
Generate a pipe from an explicit valid bit and some data
Generate a pipe from an explicit valid bit and some data
the valid bit (must be a hardware type)
the data (must be a hardware type)
the number of pipeline stages
the Valid output of the final pipeline stage
A factory to generate a hardware pipe. This can be used to delay Valid data by a design-time configurable number of cycles.
Here, we construct three different pipes using the different provided
apply
methods and hook them up together. The types are explicitly specified to show that these all communicate using Valid interfaces:The ShiftRegister factory to generate a pipe without a Valid interface
Queue and the Queue factory for actual queues
Valid interface
Pipe class for an alternative API