Marks a set of components (and their interconnected components) to be included in a new instance hierarchy.
Marks a set of components (and their interconnected components) to be included in a new instance hierarchy.
Parent type of input components
components in this group
suggested name of the new module
suggested name of the instance of the new module
suggested suffix of any output ports of the new module
suggested suffix of any input ports of the new module
necessary for backwards compatibility
Intermediate wires will get pulled into the new instance, but intermediate registers will not because they are also connected to their module's clock port. This means that if you want a register to be included in a group, it must be explicitly referred to in the input list.
Marks that a module to be ignored in Dedup Transform in Firrtl pass
Intermediate wires will get pulled into the new instance, but intermediate registers will not because they are also connected to their module's clock port. This means that if you want a register to be included in a group, it must be explicitly referred to in the input list.