SInt
chisel3
SIntImpl
numbers
SIntInteger
numbers
SIntIntegerImpl
SIntImpl
SIntIsReal
numbers
SIntOrder
numbers
SIntRing
numbers
SIntSigned
numbers
Saturate
dsptools
SeqMem
chisel3
ShiftRegisterWithReset
counters
Sign
numbers
SignAction
Sign
SignAlgebra
Sign
SignMultiplicativeGroup
Sign
Signed
numbers
SignedOps
numbers
SignedSyntax
numbers
StreamingAutocorrelator
examples
SyncReadMem
chisel3
shl
BinaryRepresentation
BinaryRepresentationDspReal
BinaryRepresentationFixedPoint
BinaryRepresentationSInt
BinaryRepresentationUInt
DspComplexBinaryRepresentation
shr
BinaryRepresentation
BinaryRepresentationFixedPoint
BinaryRepresentationSInt
BinaryRepresentationUInt
DspComplexBinaryRepresentation
DspRealReal
sign
SignAlgebra
Signed
SignedOps
signBit
BinaryRepresentation
BinaryRepresentationOps
DspComplexBinaryRepresentation
DspRealReal
FixedPointReal
SIntInteger
UIntInteger
signConvert
DspTesterUtilities
signedOps
SignedSyntax
signedToBigIntUnsigned
DspTesterUtilities
signum
DspRealSigned
FixedPointReal
SIntSigned
SignAlgebra
Signed
SignedOps
UIntSigned
sin
DspReal
RealTrig
sinCoeff
TrigUtility
sinh
DspReal
RealTrig
sqrt
DspReal
RealTrig
step
DspTester
stepPrint
VerilogTbDump
string2Printable
chisel3