FirrtlTerp

This is the Firrtl interpreter. It is the top level control engine that controls the simulation of a circuit running.

It coordinates updating of the circuit's inputs (other elements, nodes, registers, etc can be forced to values) and querying the circuits outputs (or optionally other circuit components)

This mainly involves updating of a circuit state instance by using a expression evaluator on a dependency graph.

Source: FirrtlTerp.scala

Linear Supertypes

SimpleLogger, AnyRef, Any

Type Hierarchy Learn more about scaladoc diagrams

Instance Constructors

new FirrtlTerp(ast: Circuit, interpreterOptions: InterpreterOptions)

ast
the circuit to be simulated

Value Members

final def !=(arg0: Any): Boolean

Definition Classes
AnyRef → Any
final def ##(): Int

Definition Classes
AnyRef → Any
final def ==(arg0: Any): Boolean

Definition Classes
AnyRef → Any
final def asInstanceOf[T0]: T0

Definition Classes
Any
val ast: Circuit

the circuit to be simulated
val blackBoxFactories: Seq[BlackBoxFactory]
def checkStopped(attemptedCommand: String = "command"): Boolean
var circuitState: CircuitState
def clearStop(): Unit

Once a stop has occured, the intepreter will not allow pokes until the stop has been cleared
def clone(): AnyRef

Attributes
protected[java.lang]
Definition Classes
AnyRef
Annotations
@throws( ... )
def cycle(showState: Boolean = false): Unit
val dependencyGraph: DependencyGraph
def disableVCD(): Unit
def doCycles(n: Int): Unit
final def eq(arg0: AnyRef): Boolean

Definition Classes
AnyRef
def equals(arg0: Any): Boolean

Definition Classes
AnyRef → Any
def evaluateCircuit(specificDependencies: Seq[String] = Seq()): Unit
val evaluator: LoFirrtlExpressionEvaluator
def finalize(): Unit

Attributes
protected[java.lang]
Definition Classes
AnyRef
Annotations
@throws( classOf[java.lang.Throwable] )
final def getClass(): Class[_]

Definition Classes
AnyRef → Any
def getValue(name: String): Concrete
def hasInput(name: String): Boolean
def hasOutput(name: String): Boolean
def hashCode(): Int

Definition Classes
AnyRef → Any
val interpreterOptions: InterpreterOptions
final def isInstanceOf[T0]: Boolean

Definition Classes
Any
var lastStopResult: Option[Int]
def log(msg: ⇒ String): Unit

Definition Classes
SimpleLogger
val loweredAst: Circuit
def makeVCDLogger(fileName: String, showUnderscored: Boolean): Unit
final def ne(arg0: AnyRef): Boolean

Definition Classes
AnyRef
final def notify(): Unit

Definition Classes
AnyRef
final def notifyAll(): Unit

Definition Classes
AnyRef
def reEvaluate(name: String): Unit
def setValue(name: String, value: Concrete, force: Boolean = true): Concrete
def setValueWithBigInt(name: String, value: BigInt, force: Boolean = true, registerPoke: Boolean = false): Concrete
def setVerbose(value: Boolean): Unit

turns on evaluator debugging.
turns on evaluator debugging. Can make output quite verbose.
value
The desired verbose setting

Definition Classes
FirrtlTerp → SimpleLogger
def stopResult: Int
def stopped: Boolean
final def synchronized[T0](arg0: ⇒ T0): T0

Definition Classes
AnyRef
val timer: Timer
def toString(): String

Definition Classes
AnyRef → Any
var verbose: Boolean

Definition Classes
SimpleLogger
final def wait(): Unit

Definition Classes
AnyRef
Annotations
@throws( ... )
final def wait(arg0: Long, arg1: Int): Unit

Definition Classes
AnyRef
Annotations
@throws( ... )
final def wait(arg0: Long): Unit

Definition Classes
AnyRef
Annotations
@throws( ... )
def writeVCD(): Unit

Related Docs: object FirrtlTerp | package firrtl_interpreter

class FirrtlTerp extends SimpleLogger

Instance Constructors

new FirrtlTerp(ast: Circuit, interpreterOptions: InterpreterOptions)

Value Members

final def !=(arg0: Any): Boolean

final def ##(): Int

final def ==(arg0: Any): Boolean

final def asInstanceOf[T0]: T0

val ast: Circuit

val blackBoxFactories: Seq[BlackBoxFactory]

def checkStopped(attemptedCommand: String = "command"): Boolean

var circuitState: CircuitState

def clearStop(): Unit

def clone(): AnyRef

def cycle(showState: Boolean = false): Unit

val dependencyGraph: DependencyGraph

def disableVCD(): Unit

def doCycles(n: Int): Unit

final def eq(arg0: AnyRef): Boolean

def equals(arg0: Any): Boolean

def evaluateCircuit(specificDependencies: Seq[String] = Seq()): Unit

val evaluator: LoFirrtlExpressionEvaluator

def finalize(): Unit

final def getClass(): Class[_]

def getValue(name: String): Concrete

def hasInput(name: String): Boolean

def hasOutput(name: String): Boolean

def hashCode(): Int

val interpreterOptions: InterpreterOptions

final def isInstanceOf[T0]: Boolean

var lastStopResult: Option[Int]

def log(msg: ⇒ String): Unit

val loweredAst: Circuit

def makeVCDLogger(fileName: String, showUnderscored: Boolean): Unit

final def ne(arg0: AnyRef): Boolean

final def notify(): Unit

final def notifyAll(): Unit

def reEvaluate(name: String): Unit

def setValue(name: String, value: Concrete, force: Boolean = true): Concrete

def setValueWithBigInt(name: String, value: BigInt, force: Boolean = true, registerPoke: Boolean = false): Concrete

def setVerbose(value: Boolean): Unit

def stopResult: Int

def stopped: Boolean

final def synchronized[T0](arg0: ⇒ T0): T0

val timer: Timer

def toString(): String

var verbose: Boolean

final def wait(): Unit

final def wait(arg0: Long, arg1: Int): Unit

final def wait(arg0: Long): Unit

def writeVCD(): Unit

Inherited from SimpleLogger

Inherited from AnyRef

Inherited from Any

Ungrouped