RemoveCHIRRTL

Type Members

type AddrMap = HashMap[String, Expression]
type DataRefMap = LinkedHashMap[String, DataRef]
type MPortMap = LinkedHashMap[String, MPorts]
type MPortTypeMap = LinkedHashMap[String, Type]
type SeqMemSet = HashSet[String]

Value Members

final def !=(arg0: Any): Boolean

Definition Classes
AnyRef → Any
final def ##(): Int

Definition Classes
AnyRef → Any
final def ==(arg0: Any): Boolean

Definition Classes
AnyRef → Any
final def asInstanceOf[T0]: T0

Definition Classes
Any
def clone(): AnyRef

Attributes
protected[java.lang]
Definition Classes
AnyRef
Annotations
@throws( ... )
def collect_refs(mports: MPortMap, smems: SeqMemSet, types: MPortTypeMap, refs: DataRefMap, raddrs: AddrMap)(s: Statement): Statement
def collect_smems_and_mports(mports: MPortMap, smems: SeqMemSet)(s: Statement): Statement
def create_exps(e: Expression): Seq[Expression]
final def eq(arg0: AnyRef): Boolean

Definition Classes
AnyRef
def equals(arg0: Any): Boolean

Definition Classes
AnyRef → Any
def execute(state: CircuitState): CircuitState

Perform the transform, encode renaming with RenameMap, and can delete annotations Called by runTransform.
Perform the transform, encode renaming with RenameMap, and can delete annotations Called by runTransform.
state
Input Firrtl AST
returns
A transformed Firrtl AST

Definition Classes
Pass → Transform
def finalize(): Unit

Attributes
protected[java.lang]
Definition Classes
AnyRef
Annotations
@throws( classOf[java.lang.Throwable] )
final def getClass(): Class[_]

Definition Classes
AnyRef → Any
final def getMyAnnotations(state: CircuitState): Seq[Annotation]

Convenience method to get annotations relevant to this Transform
Convenience method to get annotations relevant to this Transform
state
The CircuitState form which to extract annotations
returns
A collection of annotations

Definition Classes
Transform
def get_mask(refs: DataRefMap)(e: Expression): Expression
def hashCode(): Int

Definition Classes
AnyRef → Any
def inputForm: CircuitForm

The CircuitForm that this transform requires to operate on
The CircuitForm that this transform requires to operate on

Definition Classes
Pass → Transform
final def isInstanceOf[T0]: Boolean

Definition Classes
Any
val logger: Logger

Definition Classes
LazyLogging
def name: String

A convenience function useful for debugging and error messages
A convenience function useful for debugging and error messages

Definition Classes
Transform
final def ne(arg0: AnyRef): Boolean

Definition Classes
AnyRef
final def notify(): Unit

Definition Classes
AnyRef
final def notifyAll(): Unit

Definition Classes
AnyRef
def outputForm: CircuitForm

The CircuitForm that this transform outputs
The CircuitForm that this transform outputs

Definition Classes
Pass → Transform
def remove_chirrtl_m(m: DefModule): DefModule
def remove_chirrtl_s(refs: DataRefMap, raddrs: AddrMap)(s: Statement): Statement
def run(c: Circuit): Circuit

Definition Classes
RemoveCHIRRTL → Pass
final def runTransform(state: CircuitState): CircuitState

Perform the transform and update annotations.
Perform the transform and update annotations.
state
Input Firrtl AST
returns
A transformed Firrtl AST

Definition Classes
Transform
final def synchronized[T0](arg0: ⇒ T0): T0

Definition Classes
AnyRef
def toString(): String

Definition Classes
AnyRef → Any
val ut: UnknownType.type
final def wait(): Unit

Definition Classes
AnyRef
Annotations
@throws( ... )
final def wait(arg0: Long, arg1: Int): Unit

Definition Classes
AnyRef
Annotations
@throws( ... )
final def wait(arg0: Long): Unit

Definition Classes
AnyRef
Annotations
@throws( ... )

Related Doc: package passes

object RemoveCHIRRTL extends Transform with Pass

Type Members

type AddrMap = HashMap[String, Expression]

type DataRefMap = LinkedHashMap[String, DataRef]

type MPortMap = LinkedHashMap[String, MPorts]

type MPortTypeMap = LinkedHashMap[String, Type]

type SeqMemSet = HashSet[String]

Value Members

final def !=(arg0: Any): Boolean

final def ##(): Int

final def ==(arg0: Any): Boolean

final def asInstanceOf[T0]: T0

def clone(): AnyRef

def collect_refs(mports: MPortMap, smems: SeqMemSet, types: MPortTypeMap, refs: DataRefMap, raddrs: AddrMap)(s: Statement): Statement

def collect_smems_and_mports(mports: MPortMap, smems: SeqMemSet)(s: Statement): Statement

def create_exps(e: Expression): Seq[Expression]

final def eq(arg0: AnyRef): Boolean

def equals(arg0: Any): Boolean

def execute(state: CircuitState): CircuitState

def finalize(): Unit

final def getClass(): Class[_]

final def getMyAnnotations(state: CircuitState): Seq[Annotation]

def get_mask(refs: DataRefMap)(e: Expression): Expression

def hashCode(): Int

def inputForm: CircuitForm

final def isInstanceOf[T0]: Boolean

val logger: Logger

def name: String

final def ne(arg0: AnyRef): Boolean

final def notify(): Unit

final def notifyAll(): Unit

def outputForm: CircuitForm

def remove_chirrtl_m(m: DefModule): DefModule

def remove_chirrtl_s(refs: DataRefMap, raddrs: AddrMap)(s: Statement): Statement

def run(c: Circuit): Circuit

final def runTransform(state: CircuitState): CircuitState

final def synchronized[T0](arg0: ⇒ T0): T0

def toString(): String

val ut: UnknownType.type

final def wait(): Unit

final def wait(arg0: Long, arg1: Int): Unit

final def wait(arg0: Long): Unit

Inherited from Pass

Inherited from Transform

Inherited from LazyLogging

Inherited from AnyRef

Inherited from Any

Ungrouped