memlib

Type Members

class ConfWriter extends AnyRef
case class Config(pin: Pin, source: Source, top: Top) extends Product with Serializable
class CreateMemoryAnnotations extends Transform
case class DefAnnotatedMemory(info: Info, name: String, dataType: Type, depth: Int, writeLatency: Int, readLatency: Int, readers: Seq[String], writers: Seq[String], readwriters: Seq[String], readUnderWrite: Option[String], maskGran: Option[BigInt], memRef: Option[(String, String)]) extends Statement with IsDeclaration with Product with Serializable
class InferReadWrite extends Transform with SeqTransformBased
sealed trait PassOption extends AnyRef
case class Pin(name: String) extends Product with Serializable
class ReplSeqMem extends Transform
class ReplaceMemMacros extends Transform

Replace DefAnnotatedMemory with memory blackbox + wrapper + conf file.
Replace DefAnnotatedMemory with memory blackbox + wrapper + conf file. This will not generate wmask ports if not needed. Creates the minimum # of black boxes needed by the design.
class ResolveMemoryReference extends Transform

Resolves annotation ref to memories that exactly match (except name) another memory
class SimpleMidTransform extends SimpleTransform
class SimpleTransform extends Transform
case class Source(name: String, module: String) extends Product with Serializable
case class Top(name: String) extends Product with Serializable
class YamlFileReader extends AnyRef
class YamlFileWriter extends AnyRef

Value Members

object AnalysisUtils
object CustomYAMLProtocol extends DefaultYamlProtocol
object InferReadWriteAnnotation
object InferReadWritePass extends Transform with Pass
object InputConfigFileName extends PassOption with Product with Serializable
object MemTransformUtils
object NoDedupMemAnnotation

A component, e.g.
A component, e.g. register etc. Must be declared only once under the TopAnnotation
object OutputConfigFileName extends PassOption with Product with Serializable
object PassCircuitName extends PassOption with Product with Serializable
object PassConfigUtil
object PassModuleName extends PassOption with Product with Serializable
object PinAnnotation

Annotates the name of the pin to add for WiringTransform
object RenameAnnotatedMemoryPorts extends Transform with Pass

Changes memory port names to standard port names (i.e.
Changes memory port names to standard port names (i.e. RW0 instead T_408)
object ReplSeqMemAnnotation
object ResolveMaskGranularity extends Transform with Pass

Determines if a write mask is needed (wmode/en and wmask are equivalent).
Determines if a write mask is needed (wmode/en and wmask are equivalent). Populates the maskGran field of DefAnnotatedMemory Annotations:
- maskGran = (dataType size) / (number of mask bits)
  - i.e. 1 if bitmask, 8 if bytemask, absent for no mask TODO(shunshou): Add floorplan info?
object ToMemIR extends Transform with Pass

Annotates sequential memories that are candidates for macro replacement.
Annotates sequential memories that are candidates for macro replacement. Requirements for macro replacement:
- read latency and write latency of one
- only one readwrite port or write port
- zero or one read port
object VerilogMemDelays extends Transform with Pass

This pass generates delay reigsters for memories for verilog

package memlib

Type Members

class ConfWriter extends AnyRef

case class Config(pin: Pin, source: Source, top: Top) extends Product with Serializable

class CreateMemoryAnnotations extends Transform

class InferReadWrite extends Transform with SeqTransformBased

sealed trait PassOption extends AnyRef

case class Pin(name: String) extends Product with Serializable

class ReplSeqMem extends Transform

class ReplaceMemMacros extends Transform

class ResolveMemoryReference extends Transform

class SimpleMidTransform extends SimpleTransform

class SimpleTransform extends Transform

case class Source(name: String, module: String) extends Product with Serializable

case class Top(name: String) extends Product with Serializable

class YamlFileReader extends AnyRef

class YamlFileWriter extends AnyRef

Value Members

object AnalysisUtils

object CustomYAMLProtocol extends DefaultYamlProtocol

object InferReadWriteAnnotation

object InferReadWritePass extends Transform with Pass

object InputConfigFileName extends PassOption with Product with Serializable

object MemTransformUtils

object NoDedupMemAnnotation

object OutputConfigFileName extends PassOption with Product with Serializable

object PassCircuitName extends PassOption with Product with Serializable

object PassConfigUtil

object PassModuleName extends PassOption with Product with Serializable

object PinAnnotation

object RenameAnnotatedMemoryPorts extends Transform with Pass

object ReplSeqMemAnnotation

object ResolveMaskGranularity extends Transform with Pass

object ToMemIR extends Transform with Pass

object VerilogMemDelays extends Transform with Pass

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