Declaration kind in lineage (e.g.
Declaration kind in lineage (e.g. input port, output port, wire)
A lineage tree representing the instance hierarchy in a design
Add pins to modules and wires a signal to them, under the scope of a specified top module Description: Adds a pin to each sink module Punches ports up from the source signal to the specified top module Punches ports down to each sink module Wires the source up and down, connecting to all sink modules Restrictions:
Add pins to modules and wires a signal to them, under the scope of a specified top module Description: Adds a pin to each sink module Punches ports up from the source signal to the specified top module Punches ports down to each sink module Wires the source up and down, connecting to all sink modules Restrictions:
A module, e.g.
A module, e.g. ExtModule etc., that should add the input pin
A component, e.g.
A component, e.g. register etc. Must be declared only once under the TopAnnotation
A module under which all sink module must be declared, and there is only one source component