This transform handles the moving of verilator source for black boxes into the target directory so that it can be accessed by verilator or other backend compilers While parsing it's annotations it looks for a BlackBoxTargetDir annotation that will set the directory where the verilog will be written.
This transform handles the moving of verilator source for black boxes into the target directory so that it can be accessed by verilator or other backend compilers While parsing it's annotations it looks for a BlackBoxTargetDir annotation that will set the directory where the verilog will be written. This annotation is typically be set by the execution harness, or directly in the tests
Finds and detects combinational logic loops in a circuit, if any exist.
Finds and detects combinational logic loops in a circuit, if any exist. Returns the input circuit with no modifications.
CombLoopException
if a loop is found
The pass will throw exceptions on "false paths"
,The pass cannot find loops that pass through ExtModules
,The pass looks for loops through combinational-read memories
,Output form: Low FIRRTL (identity transform)
,Input form: Low FIRRTL
Dead Code Elimination (DCE)
Dead Code Elimination (DCE)
Performs DCE by constructing a global dependency graph starting with top-level outputs, external module ports, and simulation constructs as circuit sinks. External modules can optionally be eligible for DCE via the OptimizableExtModuleAnnotation.
Dead code is eliminated across module boundaries. Wires, ports, registers, and memories are all eligible for removal. Components marked with a DontTouchAnnotation will be treated as a circuit sink and thus anything that drives such a marked component will NOT be removed.
This transform preserves deduplication. All instances of a given firrtl.ir.DefModule are treated as the same individual module. Thus, while certain instances may have dead code due to the circumstances of their instantiation in their parent module, they will still not be removed. To remove such modules, use the NoDedupAnnotation to prevent deduplication.
Takes flatten annotations for module instances and modules and inline the entire hierarchy of modules down from the annotations.
Takes flatten annotations for module instances and modules and inline the entire hierarchy of modules down from the annotations. This transformation instantiates and is based on the InlineInstances transformation. Note: Inlining a module means inlining all its children module instances
Remove Synchronous Reset
Remove Synchronous Reset
This pass must run after LowerTypes
A component that should be preserved
A component that should be preserved
DCE treats the component as a top-level sink of the circuit
Tags an annotation to be consumed by this transform
Indicate that DCE should not be run
A component, e.g.
A component, e.g. register etc. Must be declared only once under the TopAnnotation
An firrtl.ir.ExtModule that can be optimized
An firrtl.ir.ExtModule that can be optimized
Firrtl does not know the semantics of an external module. This annotation provides some "greybox" information that the external module does not have any side effects. In particular, this means that the external module can be Dead Code Eliminated.
Unlike DontTouchAnnotation, we don't care if the annotation is deleted