EdgeData
graph
EdgeNotFoundException
graph
EliminateTargetPaths
transforms
EmissionOption
firrtl
EmitAllModulesAnnotation
firrtl
EmitAnnotation
firrtl
EmitCircuitAnnotation
firrtl
EmitOneFilePerModuleAnnotation
DriverCompatibility
EmittedAnnotation
firrtl
EmittedCircuit
firrtl
EmittedCircuitAnnotation
firrtl
EmittedComponent
firrtl
EmittedFirrtlCircuit
firrtl
EmittedFirrtlCircuitAnnotation
firrtl
EmittedFirrtlModule
firrtl
EmittedFirrtlModuleAnnotation
firrtl
EmittedModule
firrtl
EmittedModuleAnnotation
firrtl
EmittedSMTModelAnnotation
smt
EmittedVerilogCircuit
firrtl
EmittedVerilogCircuitAnnotation
firrtl
EmittedVerilogModule
firrtl
EmittedVerilogModuleAnnotation
firrtl
Emitter
firrtl
EmitterException
firrtl
EmptyExpression
firrtl
EmptyStmt
ir
EnNotUInt
CheckTypes
EnableNotUInt
CheckTypes
Eq
PrimOps
EqDoPrimGen
ExprGen
Error
LogLevel
Errors
passes
EulerTour
graph
ExceptOnError
options
ExecutionOptionsManager
firrtl
ExitCode
options
ExitFailure
options
ExitSuccess
options
ExpKind
firrtl
ExpandConnects
passes
ExpandPrepares
transforms
ExpandWhens
passes
ExpandWhensAndCheck
passes
ExprForeach
Foreachers
ExprGen
fuzzer
ExprGenParams
fuzzer
ExprMap
Mappers
ExprState
fuzzer
Expression
ir
ExpressionSerializer
JsonProtocol
ExtModule
ir
ExtModulePathAnnotation
transforms
e
JQFException
e1
WrappedExpression
edgeData
EdgeData
edgeDataMap
EdgeData MutableEdgeData
emit
Emitter FirrtlEmitter VerilogEmitter
emitOneFilePerModule
FirrtlExecutionOptions
emitType
FirrtlExecutionSuccess
emitVerilogBind
VerilogRender
emit_streams
VerilogRender
emit_verilog
VerilogRender
emitted
FirrtlExecutionSuccess
emittedCircuitOption
CircuitState
emittedComponents
CircuitState
emitter
Compiler EmitAllModulesAnnotation EmitAnnotation EmitCircuitAnnotation HighFirrtlCompiler LowFirrtlCompiler MiddleFirrtlCompiler MinimumVerilogCompiler NoneCompiler SystemVerilogCompiler VerilogCompiler
en
Print Stop Verification
encapsulatedBy
Target
encapsulatingModule
IsMember
encapsulatingModuleTarget
IsMember
engine
JQFFuzzOptions
enteringChildInstance
ConnectionGraph
enteringNonParentInstance
ConnectionGraph
enteringParentInstance
ConnectionGraph
equals
MemoizedHash WrappedExpression WrappedType WrappedWidth HashCode IntWidth
eqw
WrappedWidth
error
Utils Logger
errorNotFound
DontTouchAnnotation
errorOnChirrtl
CheckChirrtl CheckHighForm CheckHighFormLike
errors
Errors
escape
FileInfo StringLit
escaped
FileInfo
escapedToVerilog
FileInfo
exceptions
PassExceptions
excludes
JQFFuzzOptions JQFReproOptions
execute
AddDescriptionNodes Compiler Driver FirrtlEmitter SeqTransform SystemVerilogEmitter Transform VerilogEmitter GetNamespace CleanupNamedTargets EliminateTargetPaths FirrtlToTransitionSystem StutteringClockTransform CheckResets JQFFuzz JQFRepro Stage ExpandWhensAndCheck InferWidths InlineInstances LowerTypes Pass RemoveCHIRRTL Uniquify ZeroWidth ClockListTransform CreateMemoryAnnotations InferReadWrite ReplSeqMem ReplaceMemMacros ResolveMemoryReference SimpleTransform WiringTransform TransformManager CatchCustomTransformExceptions CheckScalaVersion ExpandPrepares TrackTransforms UpdateAnnotations BlackBoxSourceHelper CheckCombLoops CombineCats ConstantPropagation DeadCodeElimination DedupModules FixAddingNegativeLiterals Flatten FlattenRegUpdate GroupComponents IdentityTransform InferResets InlineBitExtractionsTransform InlineBooleanExpressions InlineCastsTransform LegalizeAndReductionsTransform LegalizeClocksAndAsyncResetsTransform ManipulateNames PropagatePresetAnnotations RemoveReset RemoveWires RenameModules ReplaceTruncatingArithmetic SimplifyMems TopWiringTransform AssertSubmoduleAssumptions ConvertAsserts RemoveVerificationStatements AnalyzeCircuit AnalyzeCircuit
executeEmptyMemStmt
ZeroWidth
executeExpectingFailure
BackendCompilationUtilities
executeExpectingSuccess
BackendCompilationUtilities
executeModule
AddDescriptionNodes
existingModules
DuplicationHelper
exitOnCrash
JQFFuzzOptions
exitOnHelp
HasParser
exp
FIRRTLParser DataRef WidthGeqConstraintAnnotation
expandCatArgs
CombineCats
expandHierarchy
DuplicationHelper
expandPrefixes
Utils
expandRef
Utils
experimental
backends
expr
IRLookup ComponentName Connect IsInvalid PartialConnect SubAccess SubField SubIndex
exprGen
ExprState
exprGenParamsExprStateInstance
ExprGenParams
exprs
Attach
exps
CDefMPort
extractRefs
DeadCodeElimination