Annotation for indicating component to be wired, and what prefix to add to the ports that are generated
Annotation for optional output files, and what directory to put those files in (absolute path) *
Punch out annotated ports out to the toplevel of the circuit.
Punch out annotated ports out to the toplevel of the circuit. This also has an option to pass a function as a parmeter to generate custom output files as a result of the additional ports
This *does* work for deduped modules