BFS
ConnectionGraph
DiGraph
BackendCompilationUtilities
util
BackendEmitters
Forms
BadPrintfException
CheckHighFormLike
BadPrintfIncorrectNumException
CheckHighFormLike
BadPrintfTrailingException
CheckHighFormLike
Binary
MemoryLoadFileType
Bits
PrimOps
BitsDoPrimGen
ExprGen
BitsWidthException
CheckWidths
BitwiseDoPrimGen
ExprGen
BlackBoxHelperAnno
transforms
BlackBoxInlineAnno
transforms
BlackBoxNotFoundException
transforms
BlackBoxPathAnno
transforms
BlackBoxResourceAnno
transforms
BlackBoxResourceFileNameAnno
transforms
BlackBoxSourceHelper
transforms
BlackBoxTargetDirAnno
transforms
Block
ir
BoolType
Utils
Bound
ir
BuildInfo
firrtl
BundleType
ir
bToA
Translator
DeletedWrapper
Compiler
UpdateAnnotations
backends
firrtl
baseFileName
EmittedAnnotation
EmittedSMTModelAnnotation
CustomFileEmission
benchmark
firrtl
bigIntToVLit
VerilogRender
bigint2WInt
Implicits
bitWidth
firrtl
blind
JQFFuzzOptions
body
Module
bool
GenMonad
boolSIntGen
ExprGen
AddSubDoPrimGen
AsSIntDoPrimGen
AsUIntDoPrimGen
BitsDoPrimGen
BitwiseDoPrimGen
CatDoPrimGen
CmpDoPrimGen
CvtDoPrimGen
DivDoPrimGen
DshlDoPrimGen
DshrDoPrimGen
HeadDoPrimGen
LiteralGen
MulDoPrimGen
MuxGen
NegDoPrimGen
NotDoPrimGen
PadDoPrimGen
ReductionDoPrimGen
ReferenceGen
RemDoPrimGen
ShlDoPrimGen
ShrDoPrimGen
TailDoPrimGen
boolUIntGen
ExprGen
AddSubDoPrimGen
AsSIntDoPrimGen
AsUIntDoPrimGen
BitsDoPrimGen
BitwiseDoPrimGen
CatDoPrimGen
CmpDoPrimGen
CvtDoPrimGen
DivDoPrimGen
DshlDoPrimGen
DshrDoPrimGen
HeadDoPrimGen
LiteralGen
MulDoPrimGen
MuxGen
NegDoPrimGen
NotDoPrimGen
PadDoPrimGen
ReductionDoPrimGen
ReferenceGen
RemDoPrimGen
ShlDoPrimGen
ShrDoPrimGen
TailDoPrimGen
boundValue
FIRRTLParser
buildInfoPackage
BuildInfo
buildNetlist
FlattenRegUpdate
buildRTLTags
DedupModules
build_attribute
VerilogRender
build_comment
VerilogRender
build_description
VerilogRender
build_netlist
VerilogRender
build_ports
VerilogRender
build_streams
VerilogRender
byteArrayOutputStream
OutputCaptor