firrtl circuit and parameters for tester are to be found here
Advance time in ticks of the UTC wallTime, the default is picoseconds, but can be read by the scaleName of the wallTime.
Advance time in ticks of the UTC wallTime, the default is picoseconds, but can be read by the scaleName of the wallTime. One should probably be advancing by some simple factor of a clock period. The clockInfoList of the options should define this (could be more than one).
units are in units of the wallTime scale.
require that a value be present on the named component
require that a value be present on the named component
component name
the BigInt value required
require that a value be present on the named component
require that a value be present on the named component
component name
the BigInt value required
Indicate failure due to an exception.
Indicate failure due to an exception.
exception causing the failure
optional message to be printed
inspect a value of a named circuit component
inspect a value of a named circuit component
the name of a circuit component
A BigInt value currently set at name
Pokes value to the port referenced by string Warning: pokes to components other than input ports is currently not supported but does not cause an error warning This feature should be supported soon
Pokes value to the port referenced by string Warning: pokes to components other than input ports is currently not supported but does not cause an error warning This feature should be supported soon
the name of a port
a value to put on that port
Pokes value to the named memory at offset
Pokes value to the named memory at offset
the name of a memory
the offset in the memory
a value to put on that port
A simplistic report of the number of expects that passed
Cycles the circuit n steps (with a default of one) At each step registers and memories are advanced and all other elements recomputed
Cycles the circuit n steps (with a default of one) At each step registers and memories are advanced and all other elements recomputed
cycles to perform
Works a lot like the chisel classic tester compiles a firrtl input string and allows poke, peek, expect and step
pokes invalidate the underlying circuit peek, expect and step, recompute (re-validate) the circuit before executing
Important note: port names in LoFirrtl have replaced dot notation with underscore notation so that io.a.b must be referenced as io_a_b