Bits

final def !=(arg0: Any): Boolean

def ##(right: Bits): Bits

Concatenation between two Bits

def ##(right: Data): Bits

final def ##(): Int

def &(right: Bits): Bits

Logical AND operator

def :=(rangesValue: (Any, Any), _rangesValues: (Any, Any)*): Unit

Assign a range value to a Bits

def :=(that: Bits): Unit

def <<(that: UInt): Bits

Logical shift left (output width will increase of w(this) + max(that) bits

def <<(that: Int): Bits

Logical shift left (output width will increase)

def <>(that: Bits): Unit

def =/=(that: Bits): Bool

def =/=(that: MaskedLiteral): Bool

BitVector is not equal to MaskedLiteral

final def ==(arg0: Any): Boolean

def ===(that: Bits): Bool

def ===(that: MaskedLiteral): Bool

Compare a BitVector with a MaskedLiteral (M"110--0")

def >>(that: UInt): Bits

Logical shift right (output width == input width)

def >>(that: Int): Bits

Logical shift right (output width will decrease)

def \(that: Bits): Bits

def ^(right: Bits): Bits

Logical XOR operator

var _spinalTags: Set[SpinalTag]

def addAttribute(attribute: Attribute): Bits.this.type

def addAttribute(name: String, value: String): Bits.this.type

def addAttribute(name: String): Bits.this.type

def addTag(spinalTag: SpinalTag): Bits.this.type

def addTags(tags: Iterable[SpinalTag]): Bits.this.type

def allowPruning(): Unit

def allowSimplifyIt(): Bits.this.type

def andR: Bool

Logical AND of all bits

def apply(offset: UInt, bitCount: BitCount): Bits.this.type

Return a range of bits at offset and of width bitCount

def apply(offset: Int, bitCount: BitCount): Bits.this.type

Return a range of bits at offset and of width bitCount

def apply(bitId: UInt): Bool

Return the bit at index bitId

def apply(bitId: Int): Bool

Return the bit at index bitId

def apply(range: Range): Bits.this.type

Return a range of bits

def apply(hi: Int, lo: Int): Bits.this.type

Return a range of bits form hi index to lo index

def asBits: Bits

def asBools: Vec[Bool]

Cast the BitVector into a Vector of Bool

def asData: Data

def asDirectionLess(): Bits.this.type

def asInput(): Bits.this.type

final def asInstanceOf[T0]: T0

def asOutput(): Bits.this.type

def asSInt: SInt

Cast a Bits to a SInt

def asUInt: UInt

Cast a Bits to an UInt

def assignDontCare(): Bits.this.type

final def assignFrom(that: AnyRef, conservative: Boolean): Unit

def assignFromBits(bits: Bits, hi: Int, lo: Int): Unit

def assignFromBits(bits: Bits): Unit

def assignFromBits(bits: Bits, offset: Int, bitCount: BitCount): Unit

var assignementThrowable: Throwable

def clearAll(): Unit

Clear all bits

def clone(): Bits.this.type

var component: Component

var compositeAssign: Assignable

val consumers: ArrayBuffer[Node]

def default(that: ⇒ Bits): Bits

var defaultValue: BaseType

def dontSimplifyIt(): Bits.this.type

final def eq(arg0: AnyRef): Boolean

def equals(arg0: Any): Boolean

def existsTag(cond: (SpinalTag) ⇒ Boolean): Boolean

def filterTag(cond: (SpinalTag) ⇒ Boolean): Iterable[SpinalTag]

def finalize(): Unit

def findTag(cond: (SpinalTag) ⇒ Boolean): Option[SpinalTag]

def flatten: Seq[BaseType]

def flattenLocalName: Seq[String]

def flip(): Bits.this.type

def forEachNameables(doThat: (Any) ⇒ Unit): Unit

def genIf(cond: Boolean): Bits.this.type

def getAllToBoolNode(): AllByBool

def getAssignementContext(id: Int): Throwable

def getBitsWidth: Int

final def getClass(): Class[_]

def getComponent(): Component

def getComponents(): Seq[Component]

def getDisplayName(): String

def getDrivingReg: Bits.this.type

def getInput(id: Int): Node

def getInputs: Iterator[Node]

def getInputsCount: Int

def getInstanceCounter: Int

def getName(): String

def getName(default: String): String

def getRefOwnersChain(): List[Any]

def getRootParent: Data

def getScalaLocationLong: String

def getScalaLocationShort: String

def getTag[T <: SpinalTag](clazz: Class[T]): Option[T]

def getWidth: Int

def getWidthNoInferation: Int

Return the width

def getWidthStringNoInferation: String

def getZero: Bits.this.type

def getZeroUnconstrained(): Bits.this.type

val globalData: GlobalData

def hasTag(spinalTag: SpinalTag): Boolean

def hashCode(): Int

def high: Int

Return the upper bound

def init(that: Bits): Bits

var input: Node

def instanceAndSyncNodeAttributes: Iterable[Attribute]

def instanceAttributes: Iterable[Attribute]

def isDelay: Boolean

def isDirectionLess: Boolean

def isEmptyOfTag: Boolean

def isInput: Boolean

final def isInstanceOf[T0]: Boolean

def isNamed: Boolean

def isOutput: Boolean

def isReg: Boolean

def isUnnamed: Boolean

def keep(): Bits.this.type

def lsb: Bool

Return the least significant bit

def msb: Bool

Return the most significant bit

def mux[T <: Data](mappings: (Any, T)*): T

def muxList[T <: Data](mappings: Seq[(Any, T)]): T

final def ne(arg0: AnyRef): Boolean

def newExtract(offset: UInt, size: Int, extract: ExtractBitsVectorFloating): Bits.this.type

Extract a range of bits of the BitVector

def newExtract(hi: Int, lo: Int, extract: ExtractBitsVectorFixed): Bits.this.type

Extract a range of bits of the BitVector

def newExtract(bitId: UInt, extract: ExtractBoolFloating): Bool

Extract a bit of the BitVector

def newExtract(bitId: Int, extract: ExtractBoolFixed): Bool

Extract a bit of the BitVector

final def notify(): Unit

final def notifyAll(): Unit

def onEachAttributes(doIt: (Attribute) ⇒ Unit): Unit

def onEachInput(doThat: (Node) ⇒ Unit): Unit

def onEachInput(doThat: (Node, Int) ⇒ Unit): Unit

def orR: Bool

Logical OR of all bits

var parent: Data

def pull(): Bits.this.type

def randBoot(): Bits.this.type

def range: Range

Return the range

var refOwner: RefOwnerType

def removeAssignements(): Unit

def removeTag(spinalTag: SpinalTag): Bits.this.type

def removeTags(tags: Iterable[SpinalTag]): Bits.this.type

def resize(width: Int): Bits.this.type

Resize the bitVector to width

def resizeLeft(width: Int): Bits

Resize by keeping MSB at the same place If the final size is bigger than the original size, the leftmost bits are filled with zeroes if the final size is smaller, only width MSB are kept

def resized: Bits.this.type

def rotateLeft(that: Int): Bits

Left rotation of that bits

def rotateLeft(that: UInt): T

Left rotation of that Bits

def rotateRight(that: Int): Bits

Right rotation of that bits

def rotateRight(that: UInt): T

Right rotation of that Bits

def setAll(): Unit

Set all bits

def setAllTo(value: Bool): Unit

Set all bits to value

def setAllTo(value: Boolean): Unit

Set all bits to value

def setAssignementContext(id: Int, that: Throwable): Unit

def setCompositeName(nameable: Nameable, postfix: String, weak: Boolean): Bits.this.type

def setCompositeName(nameable: Nameable, postfix: String): Bits.this.type

def setCompositeName(nameable: Nameable, weak: Boolean): Bits.this.type

def setCompositeName(nameable: Nameable): Bits.this.type

def setInput(id: Int, node: Node): Unit

def setName(name: String, weak: Boolean = false): Bits.this.type

def setPartialName(name: String, weak: Boolean): Bits.this.type

def setPartialName(owner: Nameable, name: String, weak: Boolean): Bits.this.type

def setPartialName(name: String): Bits.this.type

def setPartialName(owner: Nameable, name: String): Bits.this.type

def setRefOwner(that: Any): Unit

def setWeakName(name: String): Bits.this.type

def setWidth(width: Int): Bits.this.type

Set the width of the BitVector

def simplifyNode: Unit

def spinalTags: Set[SpinalTag]

def subdivideIn(sliceWidth: BitCount): Vec[T]

Split the BitVector into slice of x bits * @example

val res = myBits.subdiviedIn(3 bits)

def subdivideIn(sliceCount: SlicesCount): Vec[T]

Split the BitVector into x slice

final def synchronized[T0](arg0: ⇒ T0): T0

def toDataType[T <: Data](dataType: T): T

Cast a Bits to a given data type

def toString(): String

def unary_~(): Bits

Inverse bitwise operator

def unsetName(): Unit

final def wait(): Unit

final def wait(arg0: Long, arg1: Int): Unit

final def wait(arg0: Long): Unit

def wrapCast[T <: BaseType](result: T, node: Cast): T

def xorR: Bool

Logical XOR of all bits

def |(right: Bits): Bits

Logical OR operator

def |<<(that: UInt): Bits

Logical shift left (output width == input width)

def |<<(that: Int): Bits

Logical shift left (output width == input width)

def |>>(that: UInt): Bits

Logical shift Right (output width == input width)

def |>>(that: Int): Bits

Logical shift right (output width == input width)

def !==(that: Bits): Bool

def unused: Unit