PhaseAddNodesIntoComponent
PhaseAllowNodesToReadInputOfKindComponent
PhaseAllowNodesToReadOutputs
PhaseCheckCombinationalLoops
PhaseCheckCrossClockDomains
PhaseCheck_noAsyncNodeWithIncompleteAssignment
PhaseCheck_noNull_noCrossHierarchy_noInputRegister_noDirectionLessIo
PhaseDeleteUselessBaseTypes
PhaseDontSymplifyBasetypeWithComplexAssignement
PhaseDontSymplifyVerilogMismatchingWidth
PhaseNameNodesByReflection
PhaseNodesBlackBoxGenerics
PhaseOrderComponentsNodes
PhasePreWidthInferationChecks
PhasePropagateBaseTypeWidth
PhaseRemoveComponentThatNeedNoHdlEmit
PhaseReplaceMemByBlackBox_simplifyWriteReadWithSameAddress
PhaseResizeLiteralSimplify
PhaseSimplifyBlacBoxGenerics