SInt
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package chisel3
Concatenation operator
Modulo operator
Modulo operator
a hardware type
the remainder of this numeric-like type divided by that
This method generates a fully combinational divider which can result in significant cycle time and area costs.
Bitwise and operator
Multiplication operator
Multiplication operator
Multiplication operator
a hardware type
the product of this numeric-like type and that
This method generates a fully combinational multiplier which can result in significant cycle time and area costs.
,The width of the returned hardware type is width of this + width of that.
Addition operator
Addition operator
a hardware type
the sum of this numeric-like type and that
The width of the returned hardware type is max(width of this, width of that).
Addition operator (constant width)
Addition operator (expanding width)
Subtraction operator
Subtraction operator
a hardware type
the difference of this numeric-like type less that
The width of the returned hardware type is max(width of this, width of that) + 1.
Subtraction operator (constant width)
Subtraction operator (increasing width)
Division operator
Division operator
a hardware type
the quotient of this numeric-like type divided by that
full rules
This method generates a fully combinational divider which can result in significant cycle time and area costs.
Connect this data to that data mono-directionally and element-wise.
Connect this data to that data mono-directionally and element-wise.
This uses the MonoConnect algorithm.
the data to connect to
Less than operator
Dynamic left shift operator
Static left shift operator
Static left shift operator
Less than or equal to operator
Connect this data to that data bi-directionally and element-wise.
Connect this data to that data bi-directionally and element-wise.
This uses the BiConnect algorithm.
the data to connect to
Dynamic not equals operator
Dynamic equals operator
Greater than operator
Greater than or equal to operator
Dynamic right shift operator
Static right shift operator
Static right shift operator
Bitwise exclusive or (xor) operator
Absolute value operator
Absolute value operator
a hardware type with a value equal to the absolute value of this numeric-like type
The width of the returned hardware type is unchanged, i.e., the width of this.
Returns a subset of bits on this Bits from hi to lo (inclusive), statically addressed.
Returns a subset of bits on this Bits from hi to lo (inclusive), statically addressed.
Returns the specified bit on this wire as a Bool, dynamically addressed.
Returns the specified bit on this Bits as a Bool, statically addressed.
Returns the specified bit on this Bits as a Bool, statically addressed.
Returns the contents of this wire as a scala.collection.Seq of Bool.
Returns the contents of this wire as a scala.collection.Seq of Bool.
Reinterpret this Bits as a FixedPoint.
Reinterpret this Bits as a FixedPoint.
Reinterpret cast as a Interval.
Reinterpret cast as a Interval.
value not guaranteed to be preserved: for example, an UInt of width 3 and value 7 (0b111) would become a FixedInt with value -1, the interpretation of the number is also affected by the specified binary point. Caution advised
Does a reinterpret cast of the bits in this node into the format that provides.
Does a reinterpret cast of the bits in this node into the format that provides. Returns a new Wire of that type. Does not modify existing nodes.
x.asTypeOf(that) performs the inverse operation of x := that.toBits.
that should have known widths
,bit widths are NOT checked, may pad or drop bits from input
Reinterpret cast to UInt.
Reinterpret cast to UInt.
Aggregates are recursively packed with the first element appearing in the least-significant bits of the result.
,value not guaranteed to be preserved: for example, a SInt of width 3 and value -1 (0b111) would become an UInt with value 7
Takes the last seed suggested.
Takes the last seed suggested. Multiple calls to this function will take the last given seed, unless this HasId is a module port (see overridden method in Data.scala).
If the final computed name conflicts with the final name of another signal, the final name may get uniquified by appending a digit at the end of the name.
Is a lower priority than suggestName, in that regardless of whether autoSeed was called, suggestName will always take precedence if it was called.
this object
Internal API; Chisel users should look at chisel3.chiselTypeOf(...).
Computes the name of this HasId, if one exists
Computes the name of this HasId, if one exists
Optionally provide a default prefix for computing the name
Optionally provide default seed for computing the name
the name, if it can be computed
add (default - no growth) operator
subtract (default - no growth) operator
Returns the width, in bits, if currently known.
Returns the width, in bits, if currently known.
Whether either autoName or suggestName has been called
Head operator
Returns whether the width is currently known.
Returns whether the width is currently known.
If this is a literal that is representable as bits, returns the value as a BigInt.
Returns the literal value if this is a literal that is representable as bits, otherwise crashes.
Returns the literal value if this is a literal that is representable as bits, otherwise crashes.
Maximum operator
Maximum operator
a hardware type
a hardware type with a value equal to the mimimum value of this numeric-like type and that
The width of the returned hardware type is max(width of this, width of that).
Minimum operator
Minimum operator
a hardware numeric-like type
a hardware type with a value equal to the mimimum value of this numeric-like type and that
The width of the returned hardware type is max(width of this, width of that).
Pad operator
Takes the first seed suggested.
Takes the first seed suggested. Multiple calls to this function will be ignored. If the final computed name conflicts with another name, it may get uniquified by appending a digit at the end.
Is a higher priority than autoSeed, in that regardless of whether autoSeed was called, suggestName will always take precedence.
The seed for the name of this component
this object
Tail operator
Returns a FIRRTL IsMember that refers to the absolute path to this object in the elaborated hardware graph
Returns a FIRRTL IsMember that refers to the absolute path to this object in the elaborated hardware graph
Returns the contents of this wire as a scala.collection.Seq of Bool.
Returns the contents of this wire as a scala.collection.Seq of Bool.
Returns a FIRRTL ComponentName that references this object
Returns a FIRRTL ComponentName that references this object
Should not be called until circuit elaboration is complete
Default print as Decimal
Returns a FIRRTL ReferenceTarget that references this object
Returns a FIRRTL ReferenceTarget that references this object
Should not be called until circuit elaboration is complete
Unary negation (expanding width)
Unary negation (constant width)
Bitwise inversion operator
Returns Some(width) if the width is known, else None.
Returns Some(width) if the width is known, else None.
Bitwise or operator
(Since version 3.0) Use '=/=', which avoids potential precedence problems
(Since version 3.2) Use asBool instead
(Since version 3.2) Use asBools instead
(Since version 3.2) litArg is deprecated, use litOption or litTo*Option
Arithmetic hardware operators
Bitwise hardware operators
Comparison hardware operators
Utilities for connecting hardware components
A data type for signed integers, represented as a binary bitvector. Defines arithmetic operations between other integer types.