util

package util

The util package provides extensions to core chisel for common hardware components and utility functions

Linear Supertypes

AnyRef, Any

Content Hierarchy

Ordering

Alphabetic
By Inheritance

Inherited

util
AnyRef
Any

Hide All
Show All

Visibility

Public
All

Type Members

class Arbiter[T <: Data] extends Module
Hardware module that is used to sequence n producers into 1 consumer.
Hardware module that is used to sequence n producers into 1 consumer. Priority is given to lower producer.
Example:
1. val arb = Module(new Arbiter(UInt(), 2)) arb.io.in(0) <> producer0.io.out arb.io.in(1) <> producer1.io.out consumer.io.in <> arb.io.out
class ArbiterIO[T <: Data] extends Bundle
IO bundle definition for an Arbiter, which takes some number of ready-valid inputs and outputs (selects) at most one.
sealed class BitPat extends AnyRef
Bit patterns are literals with masks, used to represent values with don't care bits.
Bit patterns are literals with masks, used to represent values with don't care bits. Equality comparisons will ignore don't care bits.
Example:
1. "b10101".U === BitPat("b101??") // evaluates to true.B "b10111".U === BitPat("b101??") // evaluates to true.B "b10001".U === BitPat("b101??") // evaluates to false.B

class Counter extends AnyRef

A counter module

Typically instantiated with apply methods in object Counter

Example:

val countOn = true.B // increment counter every clock cycle
val (counterValue, counterWrap) = Counter(countOn, 4)
when (counterValue === 3.U) {
  ...
}

class DecoupledIO[+T <: Data] extends ReadyValidIO[T]
A concrete subclass of ReadyValidIO signaling that the user expects a "decoupled" interface: 'valid' indicates that the producer has put valid data in 'bits', and 'ready' indicates that the consumer is ready to accept the data this cycle.
A concrete subclass of ReadyValidIO signaling that the user expects a "decoupled" interface: 'valid' indicates that the producer has put valid data in 'bits', and 'ready' indicates that the consumer is ready to accept the data this cycle. No requirements are placed on the signaling of ready or valid.
trait Enum extends AnyRef
Defines a set of unique UInt constants
Defines a set of unique UInt constants
Unpack with a list to specify an enumeration. Usually used with switch to describe a finite state machine.
Example:
1. val state_on :: state_off :: Nil = Enum(2) val current_state = WireInit(state_off) switch (current_state) { is (state_on) { ... } is (state_off) { ... } }
trait HasBlackBoxInline extends BlackBox
trait HasBlackBoxResource extends BlackBox
class IrrevocableIO[+T <: Data] extends ReadyValidIO[T]
A concrete subclass of ReadyValidIO that promises to not change the value of 'bits' after a cycle where 'valid' is high and 'ready' is low.
A concrete subclass of ReadyValidIO that promises to not change the value of 'bits' after a cycle where 'valid' is high and 'ready' is low. Additionally, once 'valid' is raised it will never be lowered until after 'ready' has also been raised.
class LockingArbiter[T <: Data] extends LockingArbiterLike[T]
abstract class LockingArbiterLike[T <: Data] extends Module
class LockingRRArbiter[T <: Data] extends LockingArbiterLike[T]
final class MixedVec[T <: core.Data] extends Record with IndexedSeq[T]
A hardware array of elements that can hold values of different types/widths, unlike Vec which can only hold elements of the same type/width.
A hardware array of elements that can hold values of different types/widths, unlike Vec which can only hold elements of the same type/width.
Example:
1. val v = Wire(MixedVec(Seq(UInt(8.W), UInt(16.W), UInt(32.W)))) v(0) := 100.U(8.W) v(1) := 10000.U(16.W) v(2) := 101.U(32.W)
class Pipe[T <: Data] extends Module
class Queue[T <: Data] extends Module
A hardware module implementing a Queue
A hardware module implementing a Queue
Example:
1. val q = Module(new Queue(UInt(), 16)) q.io.enq <> producer.io.out consumer.io.in <> q.io.deq
class QueueIO[T <: Data] extends Bundle
An I/O Bundle for Queues
class RRArbiter[T <: Data] extends LockingRRArbiter[T]
Hardware module that is used to sequence n producers into 1 consumer.
Hardware module that is used to sequence n producers into 1 consumer. Producers are chosen in round robin order.
Example:
1. val arb = Module(new RRArbiter(UInt(), 2)) arb.io.in(0) <> producer0.io.out arb.io.in(1) <> producer1.io.out consumer.io.in <> arb.io.out
abstract class ReadyValidIO[+T <: Data] extends Bundle
An I/O Bundle containing 'valid' and 'ready' signals that handshake the transfer of data stored in the 'bits' subfield.
An I/O Bundle containing 'valid' and 'ready' signals that handshake the transfer of data stored in the 'bits' subfield. The base protocol implied by the directionality is that the producer uses the interface as-is (outputs bits) while the consumer uses the flipped interface (inputs bits). The actual semantics of ready/valid are enforced via the use of concrete subclasses.
class SwitchContext[T <: Bits] extends AnyRef
Implementation details for switch.
Implementation details for switch. See switch and is for the user-facing API.

Note
DO NOT USE. This API is subject to change without warning.
class Valid[+T <: Data] extends Bundle
An Bundle containing data and a signal determining if it is valid
type ValidIO[+T <: Data] = Valid[T]
Synonyms, moved from main package object - maintain scope.

Value Members

val DecoupledIO: Decoupled.type
val ValidIO: Valid.type
object BitPat

object Cat

Concatenates elements of the input, in order, together.

Example:

Cat("b101".U, "b11".U)  // equivalent to "b101 11".U
Cat(myUIntWire0, myUIntWire1)

Cat(Seq("b101".U, "b11".U))  // equivalent to "b101 11".U
Cat(mySeqOfBits)

object Counter
object Decoupled
This factory adds a decoupled handshaking protocol to a data bundle.
object DeqIO
Consumer - drives (outputs) ready, inputs valid and bits.
object EnqIO
Producer - drives (outputs) valid and bits, inputs ready.
object Enum extends Enum

object Fill

Create repetitions of the input using a tree fanout topology.

Example:

Fill(2, "b1000".U)  // equivalent to "b1000 1000".U
Fill(2, "b1001".U)  // equivalent to "b1001 1001".U
Fill(2, myUIntWire)  // dynamic fill

object FillInterleaved

Creates repetitions of each bit of the input in order.

Example:

FillInterleaved(2, "b1 0 0 0".U)  // equivalent to "b11 00 00 00".U
FillInterleaved(2, "b1 0 0 1".U)  // equivalent to "b11 00 00 11".U
FillInterleaved(2, myUIntWire)  // dynamic interleaved fill

FillInterleaved(2, Seq(true.B, false.B, false.B, false.B))  // equivalent to "b11 00 00 00".U
FillInterleaved(2, Seq(true.B, false.B, false.B, true.B))  // equivalent to "b11 00 00 11".U

object ImplicitConversions
Implicit conversions to automatically convert scala.Boolean and scala.Int to Bool and UInt respectively
object Irrevocable
Factory adds an irrevocable handshaking protocol to a data bundle.
object LFSR16
object ListLookup
object Log2
Returns the base-2 integer logarithm of an UInt.
Returns the base-2 integer logarithm of an UInt.
Example:
1. Log2(8.U) // evaluates to 3.U Log2(13.U) // evaluates to 3.U (truncation) Log2(myUIntWire)
Note
The result is truncated, so e.g. Log2(13.U) === 3.U
object Lookup
object MixedVec
object MixedVecInit
object Mux1H
Builds a Mux tree out of the input signal vector using a one hot encoded select signal.
Builds a Mux tree out of the input signal vector using a one hot encoded select signal. Returns the output of the Mux tree.

Note
results undefined if multiple select signals are simultaneously high
object MuxCase
Given an association of values to enable signals, returns the first value with an associated high enable signal.
object MuxLookup
Creates a cascade of n Muxs to search for a key value.
object OHToUInt
Returns the bit position of the sole high bit of the input bitvector.
Returns the bit position of the sole high bit of the input bitvector.
Inverse operation of UIntToOH.

Note
assumes exactly one high bit, results undefined otherwise
object Pipe
A hardware module that delays data coming down the pipeline by the number of cycles set by the latency parameter.
A hardware module that delays data coming down the pipeline by the number of cycles set by the latency parameter. Functionality is similar to ShiftRegister but this exposes a Pipe interface.
Example usage:
```
val pipe = new Pipe(UInt())
pipe.io.enq <> produce.io.out
consumer.io.in <> pipe.io.deq
```

object PopCount

Returns the number of bits set (value is 1 or true) in the input signal.

Example:

PopCount(Seq(true.B, false.B, true.B, true.B))  // evaluates to 3.U
PopCount(Seq(false.B, false.B, true.B, false.B))  // evaluates to 1.U

PopCount("b1011".U)  // evaluates to 3.U
PopCount("b0010".U)  // evaluates to 1.U
PopCount(myUIntWire)  // dynamic count

object PriorityEncoder
Returns the bit position of the least-significant high bit of the input bitvector.
Returns the bit position of the least-significant high bit of the input bitvector.
Multiple bits may be high in the input.
object PriorityEncoderOH
Returns a bit vector in which only the least-significant 1 bit in the input vector, if any, is set.
object PriorityMux
Builds a Mux tree under the assumption that multiple select signals can be enabled.
Builds a Mux tree under the assumption that multiple select signals can be enabled. Priority is given to the first select signal.
Returns the output of the Mux tree.
object Queue
Factory for a generic hardware queue.
Factory for a generic hardware queue.
returns
output (dequeue) interface from the queue
Example:
1. consumer.io.in <> Queue(producer.io.out, 16)
object ReadyValidIO
object RegEnable

object Reverse

Returns the input in bit-reversed order.

Returns the input in bit-reversed order. Useful for little/big-endian conversion.

Example:

Reverse("b1101".U)  // equivalent to "b1011".U
Reverse("b1101".U(8.W))  // equivalent to "b10110000".U
Reverse(myUIntWire)  // dynamic reverse

object ShiftRegister
object TransitName
The purpose of TransitName is to allow a library to 'move' a name call to a more appropriate place.
The purpose of TransitName is to allow a library to 'move' a name call to a more appropriate place. For example, a library factory function may create a module and return the io. The only user-exposed field is that given IO, which can't use any name supplied by the user. This can add a hook so that the supplied name then names the Module. See Queue companion object for working example
object UIntToOH
Returns the one hot encoding of the input UInt.
object Valid
Adds a valid protocol to any interface
object is
Use to specify cases in a switch block, equivalent to a when block comparing to the condition variable.
Use to specify cases in a switch block, equivalent to a when block comparing to the condition variable.

Note
dummy implementation, a macro inside switch transforms this into the actual implementation
,
each is must be mutually exclusive
,
must be a literal
,
illegal outside a switch block
object isPow2
Check if an Integer is a power of 2
object log2Ceil
Compute the log2 rounded up
object log2Down
Compute the log2 rounded down with min value of 1
object log2Floor
Compute the log2 rounded down
object log2Up
Compute the log2 rounded up with min value of 1

object switch

Conditional logic to form a switch block.

Conditional logic to form a switch block. See is for the case API.

Example:

switch (myState) {
  is (state1) {
    // some logic here that runs when myState === state1
  }
  is (state2) {
    // some logic here that runs when myState === state2
  }
}

object unless

Packages

Package structure

util

package util

Type Members

Value Members

Inherited from AnyRef

Inherited from Any

Ungrouped

Packages

Package structure

util 

package util

Type Members

Value Members

Inherited from AnyRef

Inherited from Any

Ungrouped

util