Fibonacci Linear Feedback Shift Register (LFSR) generator.

A Fibonacci LFSR can be generated by defining a width and a set of tap points (corresponding to a polynomial). An optional initial seed and a reduction operation (XOR, the default, or XNOR) can be used to augment the generated hardware. The resulting hardware has support for a run-time programmable seed (via PRNGIO.seed) and conditional increment (via PRNGIO.increment).

If the user specifies a seed, then a compile-time check is added that they are not initializing the LFSR to a state which will cause it to lock up. If the user does not set a seed, then the least significant bit of the state will be set or reset based on the choice of reduction operator.

In the example below, a 4-bit Fibonacci LFSR is constructed. Tap points are defined as four and three (using LFSR convention of indexing from one). This results in the hardware configuration shown in the diagram.

val lfsr4 = Module(new FibonacciLFSR(4, Set(4, 3))
//                 +---+
// +-------------->|XOR|-------------------------------------------------------+
// |               +---+                                                       |
// |   +-------+     ^     +-------+           +-------+           +-------+   |
// |   |       |     |     |       |           |       |           |       |   |
// +---+  x^4  |<----+-----|  x^3  |<----------|  x^2  |<----------|  x^1  |<--+
//     |       |           |       |           |       |           |       |
//     +-------+           +-------+           +-------+           +-------+

If you require a maximal period Fibonacci LFSR of a specific width, you can use MaxPeriodFibonacciLFSR. If you only require a pseudorandom UInt you can use the FibonacciLFSR companion object.