firrtl_interpreter 1.2.7 - firrtl

Type Members

abstract class BlackBoxFactory extends AnyRef

For each instantiation of an ExtModule the interpreter needs a separate instance of a BlackBoxImplementation.

For each instantiation of an ExtModule the interpreter needs a separate instance of a BlackBoxImplementation. This factory provides it.

Example:

class ExampleBBFactory extends BlackBoxFactory {
  override def createInstatnce(instanceName: String, blackBoxName: String): Option[BlackBoxImplementation] = {
    instanceName match {
      case "bb1" => Some(add(new BB1Impl))
      case "bb2" => Some(add(new BB2Impl))
      case "bb3" => Some(add(new BB3Impl))
      case _ => throw Exeception(s"ExampleBBBFactory does not know how to create $instanceName}")
    }
  }
}

abstract class BlackBoxImplementation extends AnyRef

This is the template for writing scala functions that implement the behaviour of a black box i.e.
This is the template for writing scala functions that implement the behaviour of a black box i.e. firrtl.ir.ExtModule. Implementing classes should add internal variables to hold any state information.
case class BlackBoxOutput(name: String, implementation: BlackBoxImplementation, dependentInputs: Seq[String], tpe: Type) extends Expression with Product with Serializable

During dependency graph processing one of these will be created for each output of each instantiated black box in the circuit
During dependency graph processing one of these will be created for each output of each instantiated black box in the circuit
name
The name of the output without module name prefix
implementation
The implementation instance of the parent black box
dependentInputs
The names of the inputs that this output depends on
tpe
the concrete return type of this output
case class CircuitState(inputPorts: Map[String, Concrete], outputPorts: Map[String, Concrete], registers: Map[String, Concrete], memories: Map[String, Memory], validNames: HashSet[String]) extends Product with Serializable

Holds the state of the circuit at a particular time State is kept for input, output and registers
Holds the state of the circuit at a particular time State is kept for input, output and registers
inputPorts
a map to current concrete value
outputPorts
a map to current concrete value
registers
a map to current concrete value
abstract class Command extends AnyRef
trait Concrete extends AnyRef
case class ConcreteClock(value: BigInt) extends Concrete with Product with Serializable
case class ConcreteSInt(value: BigInt, width: Int, poisoned: Boolean = false) extends Concrete with Product with Serializable

A runtime instance of a SInt
A runtime instance of a SInt
value
the BigInt value of this UInt,
width
the number of bits in this value, must be big enough to contain value plus 1 for sign bit
case class ConcreteUInt(value: BigInt, width: Int, poisoned: Boolean = false) extends Concrete with Product with Serializable

A runtime instance of a UInt
A runtime instance of a UInt
value
the BigInt value of this UInt, must be non-negative
width
the number of bits in this value, must be big enough to contain value
class DependencyGraph extends AnyRef

A (probably overly complex) map of the names to expressions that occur in @circuit This is used by the expression evaluator to follow dependencies It also maintains lists or sets of ports, registers, memories, stop and printf statements.
A (probably overly complex) map of the names to expressions that occur in @circuit This is used by the expression evaluator to follow dependencies It also maintains lists or sets of ports, registers, memories, stop and printf statements. The above information is created by the companion object which does the actual work of traversing the circuit and discovering the various components and expressions
class ExpressionExecutionStack extends AnyRef
class FirrtlRepl extends AnyRef
class FirrtlTerp extends SimpleLogger

This is the Firrtl interpreter.
This is the Firrtl interpreter. It is the top level control engine that controls the simulation of a circuit running.
It coordinates updating of the circuit's inputs (other elements, nodes, registers, etc can be forced to values) and querying the circuits outputs (or optionally other circuit components)
This mainly involves updating of a circuit state instance by using a expression evaluator on a dependency graph.
trait HasInterpreterOptions extends AnyRef
trait HasInterpreterSuite extends ExecutionOptionsManager with HasFirrtlOptions with HasInterpreterOptions
trait HasReplConfig extends AnyRef
trait HasVcdReplayOptions extends AnyRef
class InterpreterException extends Exception

Created by chick on 4/21/16.
case class InterpreterOptions(writeVCD: Boolean = false, vcdShowUnderscored: Boolean = false, setVerbose: Boolean = false, setOrderedExec: Boolean = false, allowCycles: Boolean = false, randomSeed: Long = System.currentTimeMillis(), blackBoxFactories: Seq[BlackBoxFactory] = Seq.empty, maxExecutionDepth: Long = ..., showFirrtlAtLoad: Boolean = false, lowCompileAtLoad: Boolean = true) extends ComposableOptions with Product with Serializable
class InterpreterOptionsManager extends ExecutionOptionsManager with HasInterpreterSuite
class InterpretiveTester extends AnyRef

Works a lot like the chisel classic tester compiles a firrtl input string and allows poke, peek, expect and step
Works a lot like the chisel classic tester compiles a firrtl input string and allows poke, peek, expect and step
pokes invalidate the underlying circuit peek, expect and step, recompute (re-validate) the circuit before executing
Important note: port names in LoFirrtl have replaced dot notation with underscore notation so that io.a.b must be referenced as io_a_b
class LoFirrtlExpressionEvaluator extends SimpleLogger

This is the evaluation engine for the FirrtlTerp it requires the previousState of the system
class Memory extends SimpleLogger

provides a black box implementation of a circuit memory presenting read, write and read/write interfaces
provides a black box implementation of a circuit memory presenting read, write and read/write interfaces
Assumptions: Zero read_latency latches data straight to memory(address): IGNORES enable
case class ReplConfig(firrtlSourceName: String = "", scriptName: String = "", firrtlSource: String = "", useVcdScript: Boolean = false, vcdScriptOverride: String = "", runScriptAtStart: Boolean = false) extends ComposableOptions with Product with Serializable
class ReplVcdController extends AnyRef
class Script extends AnyRef
case class ScriptFactory(parent: FirrtlRepl) extends Product with Serializable
trait SimpleLogger extends AnyRef
class StopException extends Exception
class Timer extends AnyRef
case class TimerEvent(tag: String) extends Product with Serializable
case class VcdReplayOptions(firrtlSourceName: String = "", vcdSourceName: String = "", skipEvents: Int = 0, eventsToRun: Int = 1, testAliasedWires: Boolean = false) extends ComposableOptions with Product with Serializable
class VcdReplayTester extends LazyLogging

This tester runs a VCD file against a circuit expressed in a firrtl file.
This tester runs a VCD file against a circuit expressed in a firrtl file. The VCD file should have been produced by running a test harness against the circuit. This test can be used to generate circuit behavior while running symbolic or concolic testing. It can also be used to determine if later changes to a circuit have changed since some original correct **golden** run of the circuit For example use the main below to run the VcdAdder files contained in the src/test/resources directory
```
sbt 'run-main firrtl_interpreter.VcdReplayTester -fs src/test/resources/VcdAdder.fir \
-vcd src/test/resources/VcdAdder.vcd'
```
class VcdReplayTesterOptions extends InterpreterOptionsManager with HasVcdReplayOptions

Value Members

val Big0: BigInt
val Big1: BigInt
val BitsRequiredOverflowSizeBigInt: BigInt
object CircuitState extends Serializable
object Concrete
val DangerShiftSize: Int
object DependencyGraph extends SimpleLogger

contains the constructor for a dependency graph.
contains the constructor for a dependency graph. The code for traversing a circuit and discovering the components and the expressions lives here
object Driver
object ExpressionExecutionStack
object FirrtlRepl
object FirrtlTerp
object InterpreterException extends Serializable
val InterpreterMaxSupportedWidth: Int
object Memory
object StopException extends Serializable
object Timer
object ToLoFirrtl
object TypeInstanceFactory

Created by chick on 4/21/16.
object VcdReplayTester
def bigIntBitsToDouble(bigInt: BigInt): Double
def boolToBigInt(condition: Boolean): BigInt
def boolToInt(condition: Boolean): Int
def ceilingLog2(x: Int): Int
def computeBits(n: BigInt): Int

Utility function that computes bits required for a number
Utility function that computes bits required for a number
n
number of interest
def doubleToBigIntBits(double: Double): BigInt
def extremaOfSIntOfWidth(width: Int): (BigInt, BigInt)

computes the smallest and largest values that will fit in an SInt
computes the smallest and largest values that will fit in an SInt
width
width of SInt
returns
tuple(minVale, maxValue)
def extremaOfUIntOfWidth(width: Int): (BigInt, BigInt)

computes the smallest and largest values that will fit in a UInt
computes the smallest and largest values that will fit in a UInt
width
width of SInt
returns
tuple(minVale, maxValue)
val random: Random
def randomBigInt(width: Int): BigInt
package real
def requiredBitsForSInt(num: BigInt): Int

return the smallest number of bits required to hold the given number in an SInt Note: positive numbers will get one minimum width one higher than would be required for a UInt
return the smallest number of bits required to hold the given number in an SInt Note: positive numbers will get one minimum width one higher than would be required for a UInt
num
number to find width for
returns
minimum required bits for an SInt
def requiredBitsForUInt(num: BigInt): Int

return the smallest number of bits required to hold the given number in an UInt Note: positive numbers will get one minimum width one higher than would be required for a UInt
return the smallest number of bits required to hold the given number in an UInt Note: positive numbers will get one minimum width one higher than would be required for a UInt
num
number to find width for
returns
minimum required bits for an SInt
def typeToWidth(tpe: Type): Int
package vcd
def widthToInt(width: Width): Int

firrtl_interpreter

package firrtl_interpreter

Type Members

abstract class BlackBoxFactory extends AnyRef

abstract class BlackBoxImplementation extends AnyRef

case class BlackBoxOutput(name: String, implementation: BlackBoxImplementation, dependentInputs: Seq[String], tpe: Type) extends Expression with Product with Serializable

case class CircuitState(inputPorts: Map[String, Concrete], outputPorts: Map[String, Concrete], registers: Map[String, Concrete], memories: Map[String, Memory], validNames: HashSet[String]) extends Product with Serializable

abstract class Command extends AnyRef

trait Concrete extends AnyRef

case class ConcreteClock(value: BigInt) extends Concrete with Product with Serializable

case class ConcreteSInt(value: BigInt, width: Int, poisoned: Boolean = false) extends Concrete with Product with Serializable

case class ConcreteUInt(value: BigInt, width: Int, poisoned: Boolean = false) extends Concrete with Product with Serializable

class DependencyGraph extends AnyRef

class ExpressionExecutionStack extends AnyRef

class FirrtlRepl extends AnyRef

class FirrtlTerp extends SimpleLogger

trait HasInterpreterOptions extends AnyRef

trait HasInterpreterSuite extends ExecutionOptionsManager with HasFirrtlOptions with HasInterpreterOptions

trait HasReplConfig extends AnyRef

trait HasVcdReplayOptions extends AnyRef

class InterpreterException extends Exception

class InterpreterOptionsManager extends ExecutionOptionsManager with HasInterpreterSuite

class InterpretiveTester extends AnyRef

class LoFirrtlExpressionEvaluator extends SimpleLogger

class Memory extends SimpleLogger

case class ReplConfig(firrtlSourceName: String = "", scriptName: String = "", firrtlSource: String = "", useVcdScript: Boolean = false, vcdScriptOverride: String = "", runScriptAtStart: Boolean = false) extends ComposableOptions with Product with Serializable

class ReplVcdController extends AnyRef

class Script extends AnyRef

case class ScriptFactory(parent: FirrtlRepl) extends Product with Serializable

trait SimpleLogger extends AnyRef

class StopException extends Exception

class Timer extends AnyRef

case class TimerEvent(tag: String) extends Product with Serializable

case class VcdReplayOptions(firrtlSourceName: String = "", vcdSourceName: String = "", skipEvents: Int = 0, eventsToRun: Int = 1, testAliasedWires: Boolean = false) extends ComposableOptions with Product with Serializable

class VcdReplayTester extends LazyLogging

class VcdReplayTesterOptions extends InterpreterOptionsManager with HasVcdReplayOptions

Value Members

val Big0: BigInt

val Big1: BigInt

val BitsRequiredOverflowSizeBigInt: BigInt

object CircuitState extends Serializable

object Concrete

val DangerShiftSize: Int

object DependencyGraph extends SimpleLogger

object Driver

object ExpressionExecutionStack

object FirrtlRepl

object FirrtlTerp

object InterpreterException extends Serializable

val InterpreterMaxSupportedWidth: Int

object Memory

object StopException extends Serializable

object Timer

object ToLoFirrtl

object TypeInstanceFactory

object VcdReplayTester

def bigIntBitsToDouble(bigInt: BigInt): Double

def boolToBigInt(condition: Boolean): BigInt

def boolToInt(condition: Boolean): Int

def ceilingLog2(x: Int): Int

def computeBits(n: BigInt): Int

def doubleToBigIntBits(double: Double): BigInt

def extremaOfSIntOfWidth(width: Int): (BigInt, BigInt)

def extremaOfUIntOfWidth(width: Int): (BigInt, BigInt)

val random: Random

def randomBigInt(width: Int): BigInt

package real

def requiredBitsForSInt(num: BigInt): Int

def requiredBitsForUInt(num: BigInt): Int

def typeToWidth(tpe: Type): Int

package vcd

def widthToInt(width: Width): Int

Inherited from AnyRef

Inherited from Any

Ungrouped