Packages

package wiring

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Visibility
  1. Public
  2. Protected

Type Members

  1. sealed trait DecKind extends AnyRef

    Declaration kind in lineage (e.g.

    Declaration kind in lineage (e.g. input port, output port, wire)

  2. case class Modifications(addPortOrWire: Option[(String, DecKind)] = None, cons: Seq[(String, String)] = Seq.empty) extends Product with Serializable

    Store of pending wiring information for a Module

  3. case class SinkAnnotation(target: Named, pin: String) extends SingleTargetAnnotation[Named] with Product with Serializable

    A module, e.g.

    A module, e.g. ExtModule etc., that should add the input pin

  4. case class SourceAnnotation(target: ComponentName, pin: String) extends SingleTargetAnnotation[ComponentName] with Product with Serializable

    A component, e.g.

    A component, e.g. register etc. Must be declared only once under the TopAnnotation

  5. class Wiring extends Pass

    Pass that computes and applies a sequence of wiring modifications

  6. case class WiringException(msg: String) extends PassException with Product with Serializable

    A class for all exceptions originating from firrtl.passes.wiring

  7. case class WiringInfo(source: ComponentName, sinks: Seq[Named], pin: String) extends Product with Serializable

    A data store of one sink--source wiring relationship

  8. case class WiringNames(compName: String, source: String, sinks: Seq[Named], pin: String) extends Product with Serializable

    A data store of wiring names

  9. class WiringTransform extends Transform

    Wires a Module's Source Target to one or more Sink Modules/Components

    Wires a Module's Source Target to one or more Sink Modules/Components

    Sinks are wired to their closest source through their lowest common ancestor (LCA). Verbosely, this modifies the circuit in the following ways:

    • Adds a pin to each sink module
    • Punches ports up from source signals to the LCA
    • Punches ports down from LCAs to each sink module
    • Wires sources up to LCA, sinks down from LCA, and across each LCA
    Exceptions thrown

    WiringException if a sink is equidistant to two sources

Deprecated Type Members

  1. case class Lineage(name: String, children: Seq[(String, Lineage)] = Seq.empty, source: Boolean = false, sink: Boolean = false, sourceParent: Boolean = false, sinkParent: Boolean = false, sharedParent: Boolean = false, addPort: Option[(String, DecKind)] = None, cons: Seq[(String, String)] = Seq.empty) extends Product with Serializable

    A lineage tree representing the instance hierarchy in a design

    A lineage tree representing the instance hierarchy in a design

    Annotations
    @deprecated
    Deprecated

    (Since version FIRRTL 1.1.1) Use DiGraph/InstanceGraph

Value Members

  1. case object DecInput extends DecKind with Product with Serializable
  2. case object DecOutput extends DecKind with Product with Serializable
  3. case object DecWire extends DecKind with Product with Serializable
  4. object WiringUtils

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