UIntLiteral
ir
UIntType
ir
UNKNOWNGENDER
firrtl
UndeclaredReferenceException
CheckChirrtl
CheckHighForm
UninferredWidth
CheckWidths
Uniquify
passes
UnknownForm
firrtl
UnknownType
ir
UnknownWidth
ir
UseInfo
Parser
Utils
firrtl
ug
VerilogMemDelays
uint
Utils
unapply
EmitAnnotation
EmittedAnnotation
EmittedCircuitAnnotation
EmittedModuleAnnotation
DeletedAnnotation
GlobalCircuitAnnotation
GroundType
IntWidth
InlineAnnotation
ClockListAnnotation
InferReadWriteAnnotation
NoDedupMemAnnotation
PinAnnotation
ReplSeqMemAnnotation
SinkAnnotation
SourceAnnotation
TopAnnotation
BlackBoxSourceAnnotation
NoDedupAnnotation
unescape
StringLitHandler
unformat
StringLitHandler
update
Annotation
updateMemMods
RenameAnnotatedMemoryPorts
ReplaceMemMacros
updateMemStmts
RenameAnnotatedMemoryPorts
ReplaceMemMacros
ResolveMemoryReference
updateStmtRefs
MemTransformUtils
updateStmts
ResolveMaskGranularity
ToMemIR
ut
CheckTypes
RemoveCHIRRTL
util
firrtl