case class LogicNode(name: String, inst: Option[String] = None, memport: Option[String] = None) extends Product with Serializable
A case class that represents a net in the circuit. This is necessary since combinational loop checking is an analysis on the netlist of the circuit; the fields are specialized for low FIRRTL. Since all wires are ground types, a given ground type net may only be a subfield of an instance or a memory port. Therefore, it is uniquely specified within its module context by its name, its optional parent instance (a WDefInstance or WDefMemory), and its optional memory port name.
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- CheckCombLoops.scala
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This is the documentation for Firrtl.