package random
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Type Members
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case class
DefRandom(info: Info, name: String, tpe: Type, clock: Option[Expression], en: Expression = Utils.True()) extends Statement with HasInfo with IsDeclaration with CanBeReferenced with UseSerializer with Product with Serializable
Named source of random values.
Named source of random values. If there is no clock expression, than it will be clocked by the global clock.
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case class
InvalidToRandomOptions(randomizeInvalidSignals: Boolean = true, randomizeDivisionByZero: Boolean = true) extends NoTargetAnnotation with Product with Serializable
Chooses how to model explicit and implicit invalid values in the circuit
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case class
UndefinedMemoryBehaviorOptions(randomizeWriteWriteConflicts: Boolean = true, assertNoOutOfBoundsWrites: Boolean = false, randomizeOutOfBoundsRead: Boolean = true, randomizeDisabledReads: Boolean = true, randomizeReadWriteConflicts: Boolean = true) extends NoTargetAnnotation with Product with Serializable
Chooses which undefined memory behaviors should be instrumented.
Value Members
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object
InvalidToRandomPass extends Transform with DependencyAPIMigration
Replaces all explicit and implicit "invalid" values with random values.
Replaces all explicit and implicit "invalid" values with random values. Explicit invalids are: - signal is invalid - signal <= valid(..., expr) Implicit invalids are: - a / b when eq(b, 0)
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object
UndefinedMemoryBehaviorPass extends Transform with DependencyAPIMigration
Adds sources of randomness to model the various "undefined behaviors" of firrtl memory.
Adds sources of randomness to model the various "undefined behaviors" of firrtl memory. - Write/Write conflict: leads to arbitrary value written to write address - Out-of-bounds write: assertion failure (disabled by default) - Out-Of-bounds read: leads to arbitrary value being read - Read w/ en=0: leads to arbitrary value being read - Read/Write conflict: leads to arbitrary value being read
This is the documentation for Firrtl.