class SymbolTable extends AnyRef
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final
def
!=(arg0: Any): Boolean
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final
def
##(): Int
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final
def
==(arg0: Any): Boolean
- Definition Classes
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- def addBlackBoxImplementation(symbol: Symbol, blackBoxImplementation: ScalaBlackBox): Unit
- def allocateData(dataStoreAllocator: DataStoreAllocator): Unit
- def apply(name: String): Symbol
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final
def
asInstanceOf[T0]: T0
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- var childrenOf: DiGraph[Symbol]
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def
clone(): AnyRef
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- def contains(name: String): Boolean
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final
def
eq(arg0: AnyRef): Boolean
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def
equals(arg0: Any): Boolean
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- def findHighestClock(symbol: Symbol): Option[Symbol]
- def get(name: String): Option[Symbol]
- def getBlackboxImplementation(symbol: Symbol): Option[ScalaBlackBox]
- def getChildren(symbols: Seq[Symbol]): Set[Symbol]
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final
def
getClass(): Class[_]
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- @native() @HotSpotIntrinsicCandidate()
- def getOrElse(name: String, default: ⇒ Symbol): Symbol
- def getParents(symbols: Seq[Symbol]): Set[Symbol]
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def
getSourcesOf(symbol: Symbol): Set[Symbol]
Find all the sources of symbol that are not non-clock inputs.
Find all the sources of symbol that are not non-clock inputs. Sinks are used here because we are working with the parents of graph This was needed because clocks of memory or other submodules may have a non-trivial connection to parent clocks
- symbol
sinks needed for this
- def getSymbolFromGetter(expressionResult: ExpressionResult, dataStore: DataStore): Option[Symbol]
-
def
hashCode(): Int
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- @native() @HotSpotIntrinsicCandidate()
- val inputPortsNames: HashSet[String]
- val instanceNameToModuleName: HashMap[String, String]
- val instanceNames: HashSet[String]
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final
def
isInstanceOf[T0]: Boolean
- Definition Classes
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- def isRegister(name: String): Boolean
- def isTopLevelInput(name: String): Boolean
- def keys: Iterable[String]
- val moduleMemoryToMemorySymbol: HashMap[String, HashSet[Symbol]]
- val nameToSymbol: HashMap[String, Symbol]
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final
def
ne(arg0: AnyRef): Boolean
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final
def
notify(): Unit
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final
def
notifyAll(): Unit
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- var orphans: Seq[Symbol]
- val outputPortsNames: HashSet[String]
- var parentsOf: DiGraph[Symbol]
- val printToPrintInfo: HashMap[Print, PrintInfo]
- val registerNames: HashSet[String]
- val registerToClock: HashMap[Symbol, Symbol]
- def render: String
- def size: Int
- val stopToStopInfo: HashMap[String, StopInfo]
- def symbols: Iterable[Symbol]
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final
def
synchronized[T0](arg0: ⇒ T0): T0
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def
toString(): String
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- val verifyInfo: HashMap[String, VerifyInfo]
- val verifyOps: ListBuffer[VerifyOp]
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final
def
wait(arg0: Long, arg1: Int): Unit
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final
def
wait(arg0: Long): Unit
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final
def
wait(): Unit
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def
finalize(): Unit
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