spinal.core

PhaseVhdl

Related Doc: package core

class PhaseVhdl extends PhaseMisc with VhdlBase

Created by PIC32F_USER on 05/06/2016.

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Inherited
  1. PhaseVhdl
  2. VhdlBase
  3. VhdlVerilogBase
  4. PhaseMisc
  5. Phase
  6. AnyRef
  7. Any
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Instance Constructors

  1. new PhaseVhdl(pc: PhaseContext)

Type Members

  1. class Process extends AnyRef

    Definition Classes
    VhdlVerilogBase
  2. case class WrappedStuff(originalName: String, newName: String) extends Product with Serializable

Value Members

  1. final def !=(arg0: Any): Boolean

    Definition Classes
    AnyRef → Any
  2. final def ##(): Int

    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean

    Definition Classes
    AnyRef → Any
  4. final def asInstanceOf[T0]: T0

    Definition Classes
    Any
  5. def blackBoxRemplaceULogic(b: BlackBox, str: String): String

  6. def clone(): AnyRef

    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  7. def compile(component: Component): Unit

  8. def emit(component: Component): String

  9. def emitArchitecture(component: Component, builder: ComponentBuilder): Unit

  10. def emitAssignement(to: Node, from: Node, ret: StringBuilder, tab: String, assignementKind: String): Unit

  11. def emitAssignementLevel(context: AssignementLevel, ret: StringBuilder, tab: String, assignementKind: String, isElseIf: Boolean = false): Unit

  12. def emitAsyncronous(component: Component, ret: StringBuilder, funcRet: StringBuilder): Unit

  13. def emitAttributes(node: Node, attributes: Iterable[Attribute], vhdlType: String, ret: StringBuilder, postfix: String = ""): Unit

  14. def emitAttributesDef(component: Component, ret: StringBuilder): Unit

  15. def emitBlackBoxComponent(component: BlackBox, ret: StringBuilder): Unit

  16. def emitBlackBoxComponents(component: Component, ret: StringBuilder): Unit

  17. def emitClockEdge(clock: Bool, edgeKind: EdgeKind): String

    Definition Classes
    VhdlBase
  18. def emitComponentInstances(component: Component, ret: StringBuilder): Unit

  19. def emitDataType(node: Node, constrained: Boolean = true): String

    Definition Classes
    VhdlBase
  20. def emitDebug(component: Component, ret: StringBuilder, enumDebugSignals: ArrayBuffer[SpinalEnumCraft[_]]): Unit

  21. def emitDirection(baseType: BaseType): String

    Definition Classes
    VhdlBase
  22. def emitEntity(component: Component, builder: ComponentBuilder): Unit

  23. def emitEnumLiteral[T <: SpinalEnum](enum: SpinalEnumElement[T], encoding: SpinalEnumEncoding): String

    Definition Classes
    VhdlBase
  24. def emitEnumPackage(out: FileWriter): Unit

  25. def emitEnumType(enum: SpinalEnum, encoding: SpinalEnumEncoding): String

    Definition Classes
    VhdlBase
  26. def emitEnumType[T <: SpinalEnum](enum: SpinalEnumCraft[T]): String

    Definition Classes
    VhdlBase
  27. def emitFuncDef(funcName: String, node: Node, context: AssignementLevel): StringBuilder

  28. def emitLibrary(builder: ComponentBuilder): Unit

  29. def emitLibrary(ret: StringBuilder): Unit

    Definition Classes
    VhdlBase
  30. def emitLogic(node: Node): String

  31. def emitPackage(out: FileWriter): Unit

  32. def emitRange(node: Widthable): String

    Definition Classes
    VhdlBase
  33. def emitReference(node: Node): String

    Definition Classes
    VhdlBase
  34. def emitSignal(ref: Node, typeNode: Node): String

    Definition Classes
    VhdlBase
  35. def emitSignals(component: Component, ret: StringBuilder, enumDebugSignals: ArrayBuffer[SpinalEnumCraft[_]]): Unit

  36. def emitSyncronous(component: Component, ret: StringBuilder): Unit

  37. def emitWrappedIoConnection(buff: StringBuilder, map: HashMap[BaseType, WrappedStuff]): Unit

  38. def emitWrappedIoSignals(buff: StringBuilder, map: HashMap[BaseType, WrappedStuff]): Unit

  39. val emitedComponent: Map[ComponentBuilder, ComponentBuilder]

  40. val emitedComponentRef: Map[Component, Component]

  41. def enumEgualsImpl(eguals: Boolean)(op: Modifier): String

  42. var enumPackageName: String

    Definition Classes
    VhdlBase
  43. final def eq(arg0: AnyRef): Boolean

    Definition Classes
    AnyRef
  44. def equals(arg0: Any): Boolean

    Definition Classes
    AnyRef → Any
  45. def extractBitVectorFixed(func: Modifier): String

  46. def extractBitVectorFloating(func: Modifier): String

  47. def extractBoolFixed(func: Modifier): String

  48. def extractBoolFloating(func: Modifier): String

  49. def finalize(): Unit

    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )
  50. def getAsyncProcesses(component: Component, merge: Boolean = true): Seq[Process]

    Definition Classes
    VhdlVerilogBase
  51. def getBaseTypeSignalInitialisation(signal: BaseType): String

  52. final def getClass(): Class[_]

    Definition Classes
    AnyRef → Any
  53. def getEnumDebugType(spinalEnum: SpinalEnum): String

  54. def getEnumToDebugFuntion(spinalEnum: SpinalEnum, source: SpinalEnumEncoding): String

  55. def getReEncodingFuntion(spinalEnum: SpinalEnum, source: SpinalEnumEncoding, target: SpinalEnumEncoding): String

  56. def getSensitivity(nodes: Iterable[Node], includeNodes: Boolean): Set[Node]

    Definition Classes
    VhdlVerilogBase
  57. def hasNetlistImpact: Boolean

    Definition Classes
    PhaseMiscPhase
  58. def hashCode(): Int

    Definition Classes
    AnyRef → Any
  59. def impl(pc: PhaseContext): Unit

    Definition Classes
    PhaseVhdlPhase
  60. def ioStdLogicVectorRestoreNames(map: HashMap[BaseType, WrappedStuff]): Unit

  61. def ioStdLogicVectorWrapNames(): HashMap[BaseType, WrappedStuff]

  62. final def isInstanceOf[T0]: Boolean

    Definition Classes
    Any
  63. def isReferenceable(node: Node): Boolean

    Definition Classes
    VhdlVerilogBase
  64. var memBitsMaskKind: MemBitsMaskKind

  65. val modifierImplMap: Map[String, (Modifier) ⇒ String]

  66. final def ne(arg0: AnyRef): Boolean

    Definition Classes
    AnyRef
  67. final def notify(): Unit

    Definition Classes
    AnyRef
  68. final def notifyAll(): Unit

    Definition Classes
    AnyRef
  69. val opThatNeedBoolCast: Set[String]

  70. def opThatNeedBoolCastGen(a: String, b: String): List[String]

  71. def operatorImplAsBinaryOperator(vhd: String)(op: Modifier): String

  72. def operatorImplAsBitsToEnum(func: Modifier): String

  73. def operatorImplAsEnumToBits(func: Modifier): String

  74. def operatorImplAsEnumToEnum(func: Modifier): String

  75. def operatorImplAsFunction(vhd: String)(func: Modifier): String

  76. def operatorImplAsUnaryOperator(vhd: String)(op: Modifier): String

  77. var outFile: FileWriter

  78. var packageName: String

    Definition Classes
    VhdlBase
  79. def resizeFunction(vhdlFunc: String)(func: Modifier): String

  80. def shiftLeftByIntImpl(func: Modifier): String

  81. def shiftRightByIntImpl(func: Modifier): String

  82. final def synchronized[T0](arg0: ⇒ T0): T0

    Definition Classes
    AnyRef
  83. def toSpinalEnumCraft[T <: SpinalEnum](that: Any): SpinalEnumCraft[T]

  84. def toString(): String

    Definition Classes
    AnyRef → Any
  85. def unaryAllBy(cast: String)(func: Modifier): String

  86. def useNodeConsumers: Boolean

    Definition Classes
    PhaseVhdlPhase
  87. final def wait(): Unit

    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  88. final def wait(arg0: Long, arg1: Int): Unit

    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  89. final def wait(arg0: Long): Unit

    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

Inherited from VhdlBase

Inherited from VhdlVerilogBase

Inherited from PhaseMisc

Inherited from Phase

Inherited from AnyRef

Inherited from Any

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