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package core

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  1. core
  2. BaseTypeCast
  3. UFixCast
  4. SFixCast
  5. BaseTypeFactory
  6. UFixFactory
  7. SFixFactory
  8. TypeFactory
  9. VecFactory
  10. SIntFactory
  11. UIntFactory
  12. BitsFactory
  13. BoolFactory
  14. AnyRef
  15. Any
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Type Members

  1. trait Area extends Nameable with ContextUser with OwnableRef with ScalaLocated

    Sometime, creating a Component to define some logic is overkill.

    Sometime, creating a Component to define some logic is overkill. For this kind of cases you can use Area to define a group of signals/logic.

    Example:
    1. val tickConter = new Area{
        val tick = Reg(UInt(8 bits) init(0)
        tick := tick + 1
      }
    See also

    Area Documentation

  2. trait AssertNodeSeverity extends AnyRef
  3. trait Assignable extends AnyRef

    Assignable trait

  4. trait Attribute extends SpinalTag
  5. class AttributeFlag extends Attribute
  6. sealed trait AttributeKind extends AnyRef
  7. class AttributeString extends Attribute
  8. abstract class BaseType extends Data with DeclarationStatement with StatementDoubleLinkedContainer[BaseType, AssignmentStatement] with Expression

    Abstract base class of all Spinal types

  9. trait BaseTypeCast extends SFixCast with UFixCast

    Base type Cast

  10. trait BaseTypeFactory extends BoolFactory with BitsFactory with UIntFactory with SIntFactory with VecFactory with SFixFactory with UFixFactory

    Base type factory

  11. implicit class BigDecimalBuilder extends AnyRef

    BigDecimal Builder

  12. case class BigIntBuilder(i: BigInt) extends Product with Serializable

    BigInt Builder

  13. case class BitCount(value: Int) extends Product with Serializable

    Represent the number of bit of a data

  14. abstract class BitVector extends BaseType with Widthable

    BitVector is a family of types for storing multiple bits of information in a single value.

    BitVector is a family of types for storing multiple bits of information in a single value. This type has three subtypes that can be used to model different behaviours:

    • Bits
    • UInt (unsigned integer)
    • SInt (signed integer)
    See also

    BitVector Documentation

  15. abstract class BitVectorLiteralFactory[T <: BitVector] extends AnyRef

    Base class to create Bit Vector from literal

  16. class Bits extends BitVector with DataPrimitives[Bits] with BitwiseOp[Bits]

    The Bits type corresponds to a vector of bits that does not convey any arithmetic meaning.

    The Bits type corresponds to a vector of bits that does not convey any arithmetic meaning.

    Example:
    1. val myBits1 = Bits(32 bits)
      val myBits2 = B(25, 8 bits)
      val myBits3 = B"8'xFF"
      val myBits4 = B"1001_0011
    See also

    Bits Documentation

  17. trait BitsFactory extends AnyRef

    Bits factory used for instance by the IODirection to create a in/out Bits

  18. trait BitwiseOp[T <: Data] extends AnyRef

    Bitwise Operation

    Bitwise Operation

    T

    the type which is associated with the bitwise operation

  19. abstract class BlackBox extends Component

    A blackbox allows the user to integrate an existing VHDL/Verilog component into the design by just specifying the interfaces.

    A blackbox allows the user to integrate an existing VHDL/Verilog component into the design by just specifying the interfaces.

    Example:
    1.  class Ram_1w_1r(wordWidth: Int, wordCount: Int) extends BlackBox {
           val generic = new Generic {
               val wordCount = Ram_1w_1r.this.wordCount
               val wordWidth = Ram_1w_1r.this.wordWidth
           }
           val io = new Bundle {
               val clk = in Bool
               val wr = new Bundle {
                   val en   = in Bool
                   val addr = in UInt (log2Up(wordCount) bit)
                   val data = in Bits (wordWidth bit)
               }
               val rd = new Bundle {
                   val en   = in Bool
                   val addr = in UInt (log2Up(wordCount) bit)
                   val data = out Bits (wordWidth bit)
               }
           }
           mapClockDomain(clock=io.clk)
      }
  20. abstract class BlackBoxULogic extends BlackBox

    Create a blackBox with std_ulogic instead of std_logic

  21. class Bool extends BaseType with DataPrimitives[Bool] with BitwiseOp[Bool]

    The Bool type corresponds to a boolean value (True or False)

    The Bool type corresponds to a boolean value (True or False)

    Example:
    1. val myBool = Bool()
      myBool := False
      myBool := Bool(false)
    See also

    Bool Documentation

  22. case class BoolEdges() extends Bundle with Product with Serializable

    Bundle for the edge detection

  23. trait BoolFactory extends AnyRef

    Bool factory used for instance by the IODirection to create a in/out Bool

  24. class Bundle extends MultiData with Nameable with OverridedEqualsHashCode

    The Bundle is a composite type that defines a group of named signals (of any SpinalHDL basic type) under a single name.

    The Bundle is a composite type that defines a group of named signals (of any SpinalHDL basic type) under a single name. The Bundle can be used to model data structures, buses and interfaces.

    Example:
    1. val cmd = new Bundle{
        val init   = in Bool
        val start  = in Bool
        val result = out Bits(32 bits)
      }
    See also

    Bundle Documentation

  25. class BundleCase extends Bundle
  26. class ClockDomain extends AnyRef

    clock and reset signals can be combined to create a clock domain.

    clock and reset signals can be combined to create a clock domain. Clock domains could be applied to some area of the design and then all synchronous elements instantiated into this area will then implicitly use this clock domain. Clock domain application work like a stack, which mean, if you are in a given clock domain, you can still apply another clock domain locally

    See also

    ClockDomain Documentation

  27. sealed trait ClockDomainBoolTag extends SpinalTag
  28. case class ClockDomainConfig(clockEdge: EdgeKind = RISING, resetKind: ResetKind = ASYNC, resetActiveLevel: Polarity = HIGH, softResetActiveLevel: Polarity = HIGH, clockEnableActiveLevel: Polarity = HIGH) extends Product with Serializable
  29. case class ClockDomainTag(clockDomain: ClockDomain) extends SpinalTag with Product with Serializable
  30. class ClockEnableArea extends Area with DelayedInit

    Clock Area with a specila clock enable

  31. case class ClockEnableTag(clockDomain: ClockDomain) extends ClockDomainBoolTag with Product with Serializable
  32. case class ClockTag(clockDomain: ClockDomain) extends ClockDomainBoolTag with Product with Serializable
  33. class ClockingArea extends Area with DelayedInit

    Clock domains could be applied to some area of the design and then all synchronous elements instantiated into this area will then implicitly use this clock domain.

    Clock domains could be applied to some area of the design and then all synchronous elements instantiated into this area will then implicitly use this clock domain.

    See also

    ClockDomain Documentation

  34. abstract class Component extends NameableByComponent with ContextUser with ScalaLocated with DelayedInit with Stackable with OwnableRef with SpinalTagReady

    Abstract class used to create a new Component

    Abstract class used to create a new Component

    Example:
    1. class MyAndGate extends Component {
        val io = new Bundle{
          val a,b = in Bool
          val res = out Bool
        }
        io.res := io.a & io.b
      }
    See also

    Component Documentation

  35. trait ConditionalContext extends GlobalDataUser
  36. trait ContextUser extends GlobalDataUser with ScalaLocated
  37. case class CyclesCount(value: BigInt) extends Product with Serializable

    Cycles number representation

  38. trait Data extends ContextUser with NameableByComponent with Assignable with SpinalTagReady with GlobalDataUser with ScalaLocated with OwnableRef
  39. class DataPimper[T <: Data] extends DataPrimitives[T]

    Should not extends AnyVal, Because it create kind of strange call stack move that make error reporting miss accurate

  40. trait DataPrimitives[T <: Data] extends AnyRef
  41. trait DataWrapper extends Data
  42. class DefaultTag extends SpinalTag
  43. case class Device(vendor: String = "?", family: String = "?", name: String = "?") extends Product with Serializable

    target device

  44. case class DoubleBuilder(d: Double) extends Product with Serializable

    Double Builder

  45. trait DummyTrait extends AnyRef
  46. case class DumpWaveConfig(depth: Int = 0, vcdPath: String = "wave.vcd") extends Product with Serializable
  47. sealed trait EdgeKind extends AnyRef
  48. class ElseWhenClause extends AnyRef
  49. implicit class ElseWhenClauseBuilder extends AnyRef

    Implicit clause builder for elseWhen

  50. class EnumLiteral[T <: SpinalEnum] extends Literal with InferableEnumEncodingImpl

    Node representation which contains the value of an SpinalEnumElement

  51. class EnumPoison extends Literal with InferableEnumEncodingImpl
  52. case class ExpNumber(value: Int) extends Product with Serializable

    Exponent representation

  53. class ExternalDriverTag extends SpinalTag
  54. case class FixedFrequency(value: HertzNumber) extends IClockDomainFrequency with Product with Serializable
  55. class Generic extends AnyRef

    Create a generic for a BlackBox

    Create a generic for a BlackBox

    Example:
    1. class myMemory(sizeMem: Int) extends BlackBox{
          val generic = new Generic{
           val size = sizeMem
          }
          val io = new Bundle { ... }
      }
  56. class GlobalData extends AnyRef

    Global data

  57. trait GlobalDataUser extends AnyRef

    Get a link to the globalData

  58. class HardType[T <: Data] extends AnyRef
  59. case class HertzNumber(v: BigDecimal) extends PhysicalNumber[HertzNumber] with Product with Serializable

    Frequency representation

  60. trait IClockDomainFrequency extends AnyRef
  61. trait IODirection extends BaseTypeFactory

    Trait used to set the direction of a data

  62. class IfDefTag extends SpinalTag
  63. abstract class ImplicitArea[T] extends Area

    Create an Area which can be assign to a data

    Create an Area which can be assign to a data

    Example:
    1. class Counter extends ImplicitArea[UInt]{
         val cnt = Reg(UInt(8 bits)
         ...
         override def implicitValue: UInt = cnt
      }
      val myCounter = Counter()
      io.myUInt = myCounter
  64. final class IntBuilder extends AnyVal

    Integer Builder

  65. sealed trait Language extends AnyRef
  66. implicit class LiteralBuilder extends AnyRef

    Literal builder S/U/B"e.g. : B"8'xFF"

  67. class MaskedBoolean extends AnyRef

    Masked Literal

    Masked Literal

    Example:
    1. val itMatch = myBits === M"00--10--" // - don't care value
  68. class MaskedLiteral extends AnyRef
  69. class Mem[T <: Data] extends DeclarationStatement with StatementDoubleLinkedContainer[Mem[_], MemPortStatement] with WidthProvider with SpinalTagReady
  70. trait MemBlackboxingPolicy extends AnyRef
  71. trait MemPortStatement extends LeafStatement with StatementDoubleLinkedContainerElement[Mem[_], MemPortStatement]
  72. class MemReadAsync extends MemPortStatement with WidthProvider with SpinalTagReady with ContextUser with Expression
  73. class MemReadSync extends MemPortStatement with WidthProvider with SpinalTagReady with ContextUser with Expression
  74. class MemReadWrite extends MemPortStatement with WidthProvider with SpinalTagReady with ContextUser with Expression
  75. trait MemTechnologyKind extends AnyRef
  76. class MemWrite extends MemPortStatement with WidthProvider with SpinalTagReady
  77. class MemWritePayload[T <: Data] extends Bundle
  78. trait MinMaxProvider extends AnyRef

    Min max base function

  79. abstract class MultiData extends Data

    Base class for multi data like Vec, Bundle

  80. trait Nameable extends OwnableRef with ContextUser
  81. trait NameableByComponent extends Nameable with GlobalDataUser
  82. class NamingScope extends AnyRef
  83. trait Num[T <: Data] extends AnyRef

    Base operations for numbers

    Base operations for numbers

    T

    the type which is associated with the base operation

  84. trait OverridedEqualsHashCode extends AnyRef
  85. trait OwnableRef extends AnyRef
  86. abstract class PhysicalNumber[T <: PhysicalNumber[_]] extends AnyRef

    Base class for the Physical representation (Hertz, Time, ...)

  87. sealed trait Polarity extends AnyRef
  88. case class PosCount(value: Int) extends Product with Serializable

    Position representation

  89. class Ram_1w_1ra extends BlackBox

    Ram 1w 1ra

  90. class Ram_1w_1rs extends BlackBox

    Ram 1w 1rs

  91. class Ram_1wors extends BlackBox

    Ram 1wors

  92. class Ram_1wrs extends BlackBox

    Ram 1wrs

  93. class Ram_2c_1w_1rs extends BlackBox

    Ram 2c 1w 1rs

  94. class Ram_2wrs extends BlackBox

    Ram 2wrs

  95. implicit class RangePimper extends AnyRef

    Implicit Range helper

  96. trait ReadUnderWritePolicy extends AnyRef
  97. case class Ref[T](value: T) extends Product with Serializable

    Use to give value by reference to a function

  98. class ResetArea extends Area with DelayedInit

    ResetArea allow to reset an area with a special reset combining with the current reset (cumulative)

  99. sealed trait ResetKind extends AnyRef
  100. case class ResetTag(clockDomain: ClockDomain) extends ClockDomainBoolTag with Product with Serializable
  101. class SFix extends XFix[SFix, SInt]

    Signed fix point

    Signed fix point

    See also

    SFix Documentation

  102. class SFix2D extends Bundle
  103. trait SFixCast extends AnyRef
  104. trait SFixFactory extends TypeFactory
  105. class SInt extends BitVector with Num[SInt] with MinMaxProvider with DataPrimitives[SInt] with BitwiseOp[SInt]

    The SInt type corresponds to a vector of bits that can be used for signed integer arithmetic.

    The SInt type corresponds to a vector of bits that can be used for signed integer arithmetic.

    Example:
    1. val mySInt = SInt(8 bits)
      mySInt    := S(4, 8 bits) + S"0000_1111"
      mySInt    := S(4) - S"h1A"
    See also

    SInt Documentation

  106. trait SIntFactory extends AnyRef

    SInt factory used for instance by the IODirection to create a in/out SInt

  107. implicit class SIntPimper extends AnyRef

    Implicit SInt helper

  108. class SafeStack[T] extends AnyRef

    Safe Stack

  109. class SafeStackWithStackable[T <: Stackable] extends SafeStack[T]
  110. trait ScalaLocated extends GlobalDataUser
  111. case class SlicesCount(value: Int) extends Product with Serializable

    Slice size representation

  112. class SlowArea extends ClockingArea

    Define a clock domain which is x time slower than the current clock

  113. case class SpinalConfig(mode: SpinalMode = null, debug: Boolean = false, debugComponents: HashSet[Class[_]] = mutable.HashSet[Class[_]](), keepAll: Boolean = false, defaultConfigForClockDomains: ClockDomainConfig = ClockDomainConfig(), onlyStdLogicVectorAtTopLevelIo: Boolean = false, defaultClockDomainFrequency: IClockDomainFrequency = UnknownFrequency(), targetDirectory: String = ".", oneFilePerComponent: Boolean = false, netlistFileName: String = null, dumpWave: DumpWaveConfig = null, globalPrefix: String = "", anonymSignalPrefix: String = null, device: Device = Device(), inlineRom: Boolean = false, genVhdlPkg: Boolean = true, verbose: Boolean = false, mergeAsyncProcess: Boolean = true, asyncResetCombSensitivity: Boolean = false, anonymSignalUniqueness: Boolean = false, phasesInserters: ArrayBuffer[(ArrayBuffer[Phase]) ⇒ Unit] = ..., transformationPhases: ArrayBuffer[Phase] = ArrayBuffer[Phase](), memBlackBoxers: ArrayBuffer[Phase] = ..., rtlHeader: String = null) extends Product with Serializable

    Spinal configuration for the generation of the RTL

  114. class SpinalEnum extends Nameable with ScalaLocated

    Base class for creating enumeration

    Base class for creating enumeration

    Example:
    1. class MyEnum extends SpinalEnum(binarySequancial){
        val s1, s2, s3, s4 = newElement()
      }

      SpinalEnum contains a list of SpinalEnumElement that is the definition of an element. SpinalEnumCraft is the hardware representation of the the element.

    See also

    Enumeration Documentation

  115. class SpinalEnumCraft[T <: SpinalEnum] extends BaseType with InferableEnumEncodingImpl with DataPrimitives[SpinalEnumCraft[T]]

    Hardware representation of an enumeration

  116. class SpinalEnumElement[T <: SpinalEnum] extends Nameable

    Definition of an element of the enumeration

  117. trait SpinalEnumEncoding extends Nameable with ScalaLocated

    Trait to define an encoding

  118. class SpinalExit extends Exception
  119. trait SpinalMode extends AnyRef
  120. class SpinalReport[T <: Component] extends AnyRef

    Spinal report give after the generation of the RTL

  121. trait SpinalTag extends AnyRef
  122. trait SpinalTagReady extends AnyRef
  123. trait Stackable extends AnyRef
  124. class SwitchContext extends AnyRef
  125. case class TimeNumber(v: BigDecimal) extends PhysicalNumber[TimeNumber] with Product with Serializable

    Time representation

  126. trait TypeFactory extends AnyRef
  127. class UFix extends XFix[UFix, UInt]

    Unsigned fix point

    Unsigned fix point

    See also

    UFix Documentation

  128. class UFix2D extends Bundle

    Two-dimensional XFix

  129. trait UFixCast extends AnyRef
  130. trait UFixFactory extends TypeFactory
  131. class UInt extends BitVector with Num[UInt] with MinMaxProvider with DataPrimitives[UInt] with BitwiseOp[UInt]

    The UInt type corresponds to a vector of bits that can be used for unsigned integer arithmetic.

    The UInt type corresponds to a vector of bits that can be used for unsigned integer arithmetic.

    Example:
    1. val myUInt = UInt(8 bits)
       myUInt := U(2,8 bits)
       myUInt := U(2)
       myUInt := U"0000_0101"
       myUInt := U"h1A"
    See also

    UInt Documentation

  132. case class UInt2D(xBitCount: BitCount, yBitCount: BitCount) extends Bundle with Product with Serializable

    Define an UInt 2D point

    Define an UInt 2D point

    xBitCount

    width of the x point

    yBitCount

    width of the y point

    Example:
    1. val positionOnScreen = Reg(UInt2D(log2Up(p.screenResX) bits, log2Up(p.screenResY) bits))
  133. trait UIntFactory extends AnyRef

    UInt factory used for instance by the IODirection to create a in/out UInt

  134. implicit class UIntPimper extends AnyRef

    Implicit UInt helper

  135. case class UnknownFrequency() extends IClockDomainFrequency with Product with Serializable
  136. class Vec[T <: Data] extends MultiData with IndexedSeq[T]

    The Vec is a composite type that defines a group of indexed signals (of any SpinalHDL basic type) under a single name

    The Vec is a composite type that defines a group of indexed signals (of any SpinalHDL basic type) under a single name

    Example:
    1. val myVecOfSInt = Vec(SInt(8 bits), 2)
    See also

    Vec Documentation

  137. class VecAccessAssign[T <: Data] extends Assignable
  138. trait VecFactory extends AnyRef

    Vec factory

  139. class VecBuilder extends AnyRef
    Definition Classes
    VecFactory
  140. class WhenContext extends ConditionalContext with ScalaLocated

    else / else if statement

    else / else if statement

    See also

    when Documentation

  141. abstract class XFix[T <: XFix[T, R], R <: BitVector with Num[R]] extends MultiData

    Base class for SFix and UFix

  142. class dontName extends Annotation with Annotation with ClassfileAnnotation

Value Members

  1. implicit def BigIntToBits(that: BigInt): Bits
  2. implicit def BigIntToBuilder(value: BigInt): BigIntBuilder
  3. implicit def BigIntToSInt(that: BigInt): SInt
  4. implicit def BigIntToUInt(that: BigInt): UInt
  5. def Bits(width: BitCount): Bits

    Create a new Bits of a given width

    Create a new Bits of a given width

    Definition Classes
    BitsFactory
  6. def Bits(): Bits

    Create a new Bits

    Create a new Bits

    Definition Classes
    BitsFactory
  7. def Bool(value: Boolean): Bool

    Create a new Bool initialized with a boolean value

    Create a new Bool initialized with a boolean value

    Definition Classes
    BoolFactory
  8. def Bool(): Bool

    Create a new Bool

    Create a new Bool

    Definition Classes
    BoolFactory
  9. implicit def DataPimped[T <: Data](that: T): DataPimper[T]

    Implicit Data helper

  10. implicit def DoubleToBuilder(value: Double): DoubleBuilder
  11. implicit def EnumCtoEnumC2[T <: SpinalEnum, T2 <: T](craft: SpinalEnumCraft[T2]): SpinalEnumCraft[T]
  12. implicit def EnumCtoEnumC3[T <: SpinalEnum, T2 <: T](craft: SpinalEnumCraft[T]): SpinalEnumCraft[T2]
  13. implicit def EnumElementToCraft[T <: SpinalEnum](element: SpinalEnumElement[T]): SpinalEnumCraft[T]
  14. implicit def EnumEtoEnumE2[T <: SpinalEnum, T2 <: T](element: SpinalEnumElement[T2]): SpinalEnumElement[T]

    Implicit enum conversion

  15. implicit def EnumEtoEnumE3[T <: SpinalEnum, T2 <: T](element: SpinalEnumElement[T]): SpinalEnumElement[T2]
  16. def False: Bool
  17. implicit def IntToBits(that: Int): Bits
  18. implicit def IntToBuilder(value: Int): IntBuilder

    Implicit Int/BigInt/Double to Builder

  19. implicit def IntToSInt(that: Int): SInt
  20. implicit def IntToUInt(that: Int): UInt

    Implicit conversion from Int/BigInt/String to UInt/SInt/Bits

  21. def SFix(peak: ExpNumber, resolution: ExpNumber): SFix
    Definition Classes
    SFixFactory
  22. def SFix(peak: ExpNumber, width: BitCount): SFix
    Definition Classes
    SFixFactory
  23. def SInt(width: BitCount): SInt

    Create a new SInt of a given width

    Create a new SInt of a given width

    Definition Classes
    SIntFactory
  24. def SInt(): SInt

    Create a new SInt

    Create a new SInt

    Definition Classes
    SIntFactory
  25. implicit def StringToBits(that: String): Bits
  26. implicit def StringToSInt(that: String): SInt
  27. implicit def StringToUInt(that: String): UInt
  28. def True: Bool

    True / False definition

  29. def UFix(peak: ExpNumber, resolution: ExpNumber): UFix
    Definition Classes
    UFixFactory
  30. def UFix(peak: ExpNumber, width: BitCount): UFix
    Definition Classes
    UFixFactory
  31. def UInt(width: BitCount): UInt

    Create a new UInt of a given width

    Create a new UInt of a given width

    Definition Classes
    UIntFactory
  32. def UInt(): UInt

    Create a new UInt

    Create a new UInt

    Definition Classes
    UIntFactory
  33. def Vec[T <: Data](firstElement: T, followingElements: T*): Vec[T]
    Definition Classes
    VecFactory
  34. def Vec[T <: Data](gen: ⇒ T, size: Int): Vec[T]
    Definition Classes
    VecFactory
  35. def Vec[T <: Data](elements: TraversableOnce[T], dataType: HardType[T] = null): Vec[T]
    Definition Classes
    VecFactory
  36. val Vec: VecBuilder
    Definition Classes
    VecFactory
  37. def assert(assertion: Bool, message: Seq[Any], severity: AssertNodeSeverity): AssertStatement
  38. def assert(assertion: Bool, message: String, severity: AssertNodeSeverity): AssertStatement
  39. def assert(assertion: Bool, message: Seq[Any]): AssertStatement
  40. def assert(assertion: Bool, message: String): AssertStatement
  41. def assert(assertion: Bool, severity: AssertNodeSeverity): AssertStatement
  42. def assert(assertion: Bool): AssertStatement
  43. final def assert(assertion: Boolean, message: ⇒ Any): Unit
    Annotations
    @elidable( ASSERTION ) @inline()
  44. def assert(assertion: Boolean): Unit

    Assertion

    Assertion

    Annotations
    @elidable( ASSERTION )
  45. def assume(assertion: Bool): AssertStatement
  46. def cover(assertion: Bool): AssertStatement
  47. implicit lazy val implicitConversions: implicitConversions

    Scala implicit

  48. def postTypeFactory[T <: Data](that: T): T
    Definition Classes
    TypeFactory
  49. implicit lazy val postfixOps: postfixOps
  50. implicit lazy val reflectiveCalls: reflectiveCalls
  51. def report(message: Seq[Any], severity: AssertNodeSeverity): AssertStatement
  52. def report(message: String, severity: AssertNodeSeverity): AssertStatement
  53. def report(message: Seq[Any]): AssertStatement
  54. def report(message: String): AssertStatement
  55. object ASYNC extends ResetKind
  56. object AllowMixedWidth extends SpinalTag
  57. object Analog

    Set a data to Analog

  58. object AnnotationUtils
  59. object ArrayManager
  60. object B extends BitVectorLiteralFactory[Bits]

    Used to create a new Bits or cast to Bits

  61. object BOOT extends ResetKind
  62. object BaseType
  63. object COMMENT_ATTRIBUTE extends AttributeKind
  64. object Cat

    Concatenate a list of data

  65. object ClockDomain
  66. object Component
  67. object ConditionalContext
  68. object CyclesCount extends Serializable
  69. object DEFAULT_ATTRIBUTE extends AttributeKind
  70. object Data
  71. object DataAssign
  72. object Driver
  73. object ERROR extends AssertNodeSeverity
  74. object FAILURE extends AssertNodeSeverity
  75. object FALLING extends EdgeKind
  76. object GlobalData
  77. object HIGH extends Polarity
  78. object HardType
  79. object ImplicitArea
  80. object Info
  81. object InitAssign
  82. object LOW extends Polarity
  83. object Language
  84. object LocatedPendingError
  85. object MaskedLiteral
  86. object Mem
  87. object MemReadAsync
  88. object MemReadSync
  89. object MemReadWrite
  90. object MemWrite
  91. object Mux

    Mux operation

  92. object NOTE extends AssertNodeSeverity
  93. object Nameable
  94. object OwnableRef
  95. object PendingError
  96. object RISING extends EdgeKind
  97. object Reg

    Create a register

  98. object RegInit

    Declare a register with an initialize value

  99. object RegNext

    Register a signal of one clock

  100. object RegNextWhen

    Register a signal when a condition is true

  101. object S extends BitVectorLiteralFactory[SInt]

    Used to create a new SInt or cast to SInt

  102. object SF
  103. object SFix2D

    Two-dimensionnal SFix

  104. object SYNC extends ResetKind
  105. object ScalaLocated
  106. object Select
  107. object Spinal
  108. object SpinalConfig extends Serializable
  109. object SpinalEnumEncoding

    Used to create a custom encoding

    Used to create a custom encoding

    Example:
    1. object BR extends SpinalEnum{
        val NE, EQ, J, JR = newElement()
        defaultEncoding = SpinalEnumEncoding("opt")(
            EQ -> 0,
            NE -> 1,
            J  -> 2,
            JR -> 3 )
      }
  110. object SpinalError
  111. object SpinalExit extends Serializable
  112. object SpinalInfo
  113. object SpinalLog
  114. object SpinalMap

    Spinal map

  115. object SpinalProgress
  116. object SpinalSystemVerilog
  117. object SpinalTagReady
  118. object SpinalVerilog
  119. object SpinalVhdl
  120. object SpinalWarning
  121. object SystemVerilog extends SpinalMode
  122. object U extends BitVectorLiteralFactory[UInt]

    Used to create a new UInt or cast to UInt

  123. object UF
  124. object UFix2D

    Two-dimensionnal UFix

  125. object UInt2D extends Serializable
  126. object VHDL extends SpinalMode
  127. object Verilator
  128. object Verilog extends SpinalMode
  129. object WARNING extends AssertNodeSeverity
  130. object allowAssignmentOverride extends SpinalTag
  131. object allowDirectionLessIoTag extends SpinalTag
  132. object auto extends MemTechnologyKind
  133. object binaryOneHot extends SpinalEnumEncoding

    Binary One hot encoding

    Binary One hot encoding

    Example:
    1. 000, 010, 100
  134. object binarySequential extends SpinalEnumEncoding

    Binary Sequential

    Binary Sequential

    Example:
    1. 000, 001, 010, 011, 100, 101, ....
  135. object blackboxAll extends MemBlackboxingPolicy
  136. object blackboxAllWhatsYouCan extends MemBlackboxingPolicy
  137. object blackboxOnlyIfRequested extends MemBlackboxingPolicy
  138. object blackboxRequestedAndUninferable extends MemBlackboxingPolicy
  139. object cloneOf

    Return a new data with the same data structure than the given parameter (including bit width)

  140. object cloneable
  141. object crossClockBuffer extends SpinalTag
  142. object crossClockDomain extends SpinalTag
  143. object default

    default statement of a switch case

    default statement of a switch case

    See also

    switch Documentation

  144. object distributedLut extends MemTechnologyKind
  145. object dontCare extends ReadUnderWritePolicy
  146. object ifGen
  147. object in extends IODirection

    Set a data to input

  148. object inWithNull extends IODirection

    Set a data to in if the data is not null

  149. object inferred extends SpinalEnumEncoding

    Inferred encoding

  150. object inout extends IODirection

    Set a data to inout

  151. object is

    is statement of a switch case

    is statement of a switch case

    See also

    switch Documentation

  152. object isPow2

    Check if a number is a power of 2

  153. object log2Up

    Give number of bit to encode a given number of states

  154. object native extends SpinalEnumEncoding

    Native encoding

  155. object noBackendCombMerge extends SpinalTag
  156. object noCombinatorialLoopCheck extends SpinalTag
  157. object noNumericType extends SpinalTag

    Transform all unsigned/signed into std_logic_vector

  158. object out extends IODirection

    Set a data to output

  159. object outWithNull extends IODirection

    Set a data to out if the data is not null

  160. object ramBlock extends MemTechnologyKind
  161. object randomBoot extends SpinalTag
  162. object readFirst extends ReadUnderWritePolicy
  163. object registerFile extends MemTechnologyKind
  164. object roundUp

    Round up a BigInt

  165. object signalCache
  166. object switch

    case/switch statement

    case/switch statement

    Example:
    1. switch(x){
          is(value1){
              //execute when x === value1
          }
          is(value2){
              //execute when x === value2
          }
          default{
             //execute if none of precedent condition meet
          }
       }
    See also

    switch Documentation

  167. object tagAutoResize extends SpinalTag
  168. object tagTruncated extends SpinalTag
  169. object uLogic extends SpinalTag

    Create a Ulogic tag used by Blackbox in order to transform std_logic into std_ulogic

  170. object unsetRegIfNoAssignementTag extends SpinalTag
  171. object unusedTag extends SpinalTag
  172. object weakCloneOf

    Return a new data with the same data structure than the given parameter (execept bit width)

  173. object when

    If statement

    If statement

    Example:
    1. when(cond1){
        myCnt := 0
      }elsewhen(cond2){
        myCnt := myCnt + 1
      }otherwise{
        myCnt := myCnt - 1
      }
    See also

    when Documentation

  174. object widthOf

    Return the number of bit of the given data

  175. object writeFirst extends ReadUnderWritePolicy

Deprecated Value Members

  1. def Vec[T <: Data](size: Int, gen: (Int) ⇒ T): Vec[T]
    Definition Classes
    VecFactory
    Annotations
    @deprecated
    Deprecated
  2. def Vec[T <: Data](size: Int, gen: ⇒ T): Vec[T]
    Definition Classes
    VecFactory
    Annotations
    @deprecated
    Deprecated
  3. def toSFix(sint: SInt): SFix
    Definition Classes
    SFixCast
    Annotations
    @deprecated
    Deprecated
  4. def toUFix(uint: UInt): UFix
    Definition Classes
    UFixCast
    Annotations
    @deprecated
    Deprecated
  5. object Sel

    Sel operation

    Sel operation

    Annotations
    @deprecated
    Deprecated

    Use Select instead

  6. object wrap
    Annotations
    @deprecated
    Deprecated

    Use cloneable instead

Inherited from BaseTypeCast

Inherited from UFixCast

Inherited from SFixCast

Inherited from BaseTypeFactory

Inherited from UFixFactory

Inherited from SFixFactory

Inherited from TypeFactory

Inherited from VecFactory

Inherited from SIntFactory

Inherited from UIntFactory

Inherited from BitsFactory

Inherited from BoolFactory

Inherited from AnyRef

Inherited from Any

Ungrouped