dfhdl-compiler-stages
dfhdl-compiler-stages
API
dfhdl
compiler
analysis
stages
verilog
VerilogBackend
VerilogPrinter
vhdl
VHDLBackend
VHDLPrinter
AddClkRst
BackendCompiler
BackendCompiler
CompiledDesign
ConnectClkRst
DFHDLUniqueNames
DropBAssignFromSeqProc
DropBinds
DropCondDcls
DropLocalDcls
DropLocalDcls
DropRegAliases
NameGroup
DropRegsWires
VarKind
VarKind
WhenGlobalRefs
DropUnreferencedAnons
DropUnreferencedVars
ExplicitClkRstCfg
ExplicitNamedVars
WhenHeader
ExplicitPrev
HasDB
HasDB
given_HasDB_DB
NamedAliases
Criteria
NamedPrev
NamedSelection
Criteria
NamedPrev
NamedSelection
OrderMembers
Order
Simple
Order
PrintCodeString
Coloring
SanityCheck
SimpleOrderMembers
Stage
StageRunner
StageRunner
StagedDesign
StagedDesign
ToED
ToRT
UniqueDesigns
VHDLProcToVerilog
ViaConnection
options
CompilerOptions
CompilerOptions
backends
dfhdl-compiler-stages
/
dfhdl
/
dfhdl.compiler
/
dfhdl.compiler.stages
/
HasDB
/
given_HasDB_DB
given_HasDB_DB
dfhdl.compiler.stages.HasDB$.given_HasDB_DB$
object
given_HasDB_DB
extends
HasDB
[
DB
]
Attributes
Graph
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Supertypes
trait
HasDB
[
DB
]
class
Object
trait
Matchable
class
Any
Self type
given_HasDB_DB
.type
Members list
Clear all
Value members
Concrete methods
def
apply
(
t
:
DB
):
DB
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Attributes
Members list
Value members
Concrete methods