core/spire.std/SeqCModule

SeqCModule

@SerialVersionUID(0L)
class SeqCModule[A, SA <: SeqOps[A, Seq, SA]](implicit val scalar: CommutativeRing[A], cbf: Factory[A, SA]) extends CModule[SA, A] with Serializable
trait CModule[SA, A]
trait RightModule[SA, A]
trait LeftModule[SA, A]
trait AdditiveCommutativeGroup[SA]
trait AdditiveCommutativeMonoid[SA]
trait AdditiveCommutativeSemigroup[SA]
trait AdditiveGroup[SA]
trait AdditiveMonoid[SA]
trait AdditiveSemigroup[SA]
trait Serializable
class Object
trait Matchable
class Any
class SeqVectorSpace[A, SA]
class SeqCoordinateSpace[A, SA]

Value members

Concrete methods

override
def minus(x: SA, y: SA): SA
Definition Classes
AdditiveGroup
def negate(sa: SA): SA
def plus(x: SA, y: SA): SA
def timesl(r: A, sa: SA): SA
def zero: SA

Inherited methods

override
def additive: CommutativeGroup[SA]
Definition Classes
AdditiveCommutativeGroup -> AdditiveCommutativeMonoid -> AdditiveCommutativeSemigroup -> AdditiveGroup -> AdditiveMonoid -> AdditiveSemigroup
Inherited from
AdditiveCommutativeGroup
def isZero(a: SA)(implicit ev: Eq[SA]): Boolean

Tests if a is zero.

Tests if a is zero.

Inherited from
AdditiveMonoid
def sum(as: IterableOnce[SA]): SA

Given a sequence of as, compute the sum.

Given a sequence of as, compute the sum.

Inherited from
AdditiveMonoid
override
def sumN(a: SA, n: Int): SA
Definition Classes
AdditiveGroup -> AdditiveMonoid -> AdditiveSemigroup
Inherited from
AdditiveGroup
override
def timesr(v: SA, r: A): SA
Definition Classes
Inherited from
CModule
override
def trySum(as: IterableOnce[SA]): Option[SA]
Definition Classes
AdditiveMonoid -> AdditiveSemigroup
Inherited from
AdditiveMonoid

Implicits

Implicits

implicit
val scalar: CommutativeRing[A]