abstract class OrderedDecoupledHWIOTester extends HWIOTester

Base class supports implementation of test circuits of modules that use Decoupled inputs and either Decoupled or Valid outputs Multiple decoupled inputs are supported. Testers that subclass this will be strictly ordered. Input will flow into their devices asynchronously but in order they were generated be compared in the order they are generated

Annotations
@deprecated
Deprecated

(Since version chisel-iotesters 2.5.0) chisel-iotesters is end-of-life. Use chiseltest instead, see https://www.chisel-lang.org/chiseltest/migrating-from-iotesters.

Source
OrderedDecoupledHWIOTester.scala
Example:
  1. class XTimesXTester extends [[OrderedDecoupledHWIOTester]] {
      val device_under_test = new XTimesY
      test_block {
        for {
          i <- 0 to 10
          j <- 0 to 10
        } {
          input_event(device_under_test.io.in.x -> i, device_under_test.in.y -> j)
          output_event(device_under_test.io.out.z -> i*j)
        }
      }
    }

    an input event is a series of values that will be gated into the decoupled input interface at the same time an output event is a series of values that will be tested at the same time independent small state machines are set up for input and output interface all inputs regardless of interfaces are submitted to the device under test in the order in which they were created likewise, all outputs regardless of which interface are tested in the same order that they were created

Linear Supertypes
HWIOTester, BasicTester, Module, RawModule, BaseModule, IsInstantiable, HasId, internal.InstanceId, AnyRef, Any
Type Hierarchy
Ordering
  1. Alphabetic
  2. By Inheritance
Inherited
  1. OrderedDecoupledHWIOTester
  2. HWIOTester
  3. BasicTester
  4. Module
  5. RawModule
  6. BaseModule
  7. IsInstantiable
  8. HasId
  9. InstanceId
  10. AnyRef
  11. Any
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Visibility
  1. Public
  2. Protected

Instance Constructors

  1. new OrderedDecoupledHWIOTester()

Type Members

  1. class GlobalEventCounter extends AnyRef
  2. case class TestingEvent(port_values: Map[Data, BigInt], event_number: Int) extends Product with Serializable

Abstract Value Members

  1. abstract val device_under_test: Module
    Definition Classes
    HWIOTester

Concrete Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. final def ##: Int
    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  4. def IO[T <: Data](iodef: T): T
    Attributes
    protected
    Definition Classes
    BaseModule
  5. def _bindIoInPlace(iodef: Data): Unit
    Attributes
    protected
    Definition Classes
    BaseModule
  6. var _closed: Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  7. def _compatAutoWrapPorts(): Unit
    Definition Classes
    BaseModule
  8. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  9. def checkAndGetCommonDecoupledOrValidParentPort(pokes: Seq[(Data, BigInt)], must_be_decoupled: Boolean = true, event_number: Int): Either[DecoupledIO[Data], ValidIO[Data]]

    Validate that all pokes ports are members of the same DecoupledIO makes a list of all decoupled parents based on the ports referenced in pokes

  10. def circuitName: String
    Attributes
    protected
    Definition Classes
    HasId
  11. final val clock: Clock
    Definition Classes
    Module
  12. def clone(): AnyRef
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.CloneNotSupportedException]) @native() @HotSpotIntrinsicCandidate()
  13. val compileOptions: CompileOptions
    Definition Classes
    RawModule
  14. val control_port_to_input_values: HashMap[DecoupledIO[Data], ArrayBuffer[TestingEvent]]
  15. val decoupled_control_port_to_output_values: HashMap[DecoupledIO[Data], ArrayBuffer[TestingEvent]]
  16. def desiredName: String
    Definition Classes
    BaseModule
  17. var enable_all_debug: Boolean
    Definition Classes
    HWIOTester
  18. var enable_printf_debug: Boolean
    Definition Classes
    HWIOTester
  19. var enable_scala_debug: Boolean
    Definition Classes
    HWIOTester
  20. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  21. def equals(that: Any): Boolean
    Definition Classes
    HasId → AnyRef → Any
  22. def finish(): Unit

    this builds a circuit to load inputs and circuits to test outputs that are controlled by either a decoupled or valid

    this builds a circuit to load inputs and circuits to test outputs that are controlled by either a decoupled or valid

    Definition Classes
    OrderedDecoupledHWIOTesterHWIOTester → BasicTester
  23. final def getClass(): Class[_ <: AnyRef]
    Definition Classes
    AnyRef → Any
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  24. def getCommands: Seq[Command]
    Attributes
    protected
    Definition Classes
    RawModule
  25. def getCommonValidParentPort(expects: Seq[(Data, BigInt)], event_number: Int): Either[DecoupledIO[Data], ValidIO[Data]]

    Validate that all pokes ports are members of the same DecoupledIO or ValidIO makes a list of all decoupled parents based on the ports referenced in pokes

  26. def getModulePorts: Seq[Data]
    Attributes
    protected[chisel3]
    Definition Classes
    BaseModule
  27. def hasSeed: Boolean
    Definition Classes
    HasId
  28. def hashCode(): Int
    Definition Classes
    HasId → AnyRef → Any
  29. def inputEvent(pokes: (Data, BigInt)*): Unit
  30. val input_event_list: ArrayBuffer[Seq[(Data, BigInt)]]
  31. def instanceName: String
    Definition Classes
    BaseModule → HasId → InstanceId
  32. val io: Bundle
    Definition Classes
    BasicTester
  33. var io_info: IOAccessor
    Definition Classes
    HWIOTester
  34. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  35. def logPrintfDebug(fmt: String, args: Bits*): Unit
    Definition Classes
    HWIOTester
  36. def logScalaDebug(msg: => String): Unit
    Definition Classes
    HWIOTester
  37. final lazy val name: String
    Definition Classes
    BaseModule
  38. def nameIds(rootClass: Class[_]): HashMap[HasId, String]
    Attributes
    protected
    Definition Classes
    BaseModule
  39. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  40. final def notify(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  41. final def notifyAll(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  42. def outputEvent(expects: (Data, BigInt)*): Unit
  43. val output_event_list: ArrayBuffer[Seq[(Data, BigInt)]]
  44. def parentModName: String
    Definition Classes
    HasId → InstanceId
  45. def parentPathName: String
    Definition Classes
    HasId → InstanceId
  46. def pathName: String
    Definition Classes
    HasId → InstanceId
  47. def popCount(n: Long): Int
    Definition Classes
    BasicTester
  48. val port_to_decoupled: HashMap[Data, DecoupledIO[Data]]
  49. val port_to_valid: HashMap[Data, ValidIO[Data]]
  50. def portsContains(elem: Data): Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  51. def portsSize: Int
    Attributes
    protected
    Definition Classes
    BaseModule
  52. def processInputEvents(): Unit

    iterate over recorded events, checking constraints on ports referenced, etc.

    iterate over recorded events, checking constraints on ports referenced, etc. use poke and expect to record

  53. def processOutputEvents(): Unit
  54. final val reset: Reset
    Definition Classes
    Module
  55. val rnd: Random.type
    Definition Classes
    HWIOTester
  56. def stop()(implicit sourceInfo: SourceInfo): Unit
    Definition Classes
    BasicTester
  57. def suggestName(seed: => String): OrderedDecoupledHWIOTester.this.type
    Definition Classes
    HasId
  58. final def synchronized[T0](arg0: => T0): T0
    Definition Classes
    AnyRef
  59. final def toAbsoluteTarget: IsModule
    Definition Classes
    BaseModule → InstanceId
  60. final def toNamed: ModuleName
    Definition Classes
    BaseModule → InstanceId
  61. def toString(): String
    Definition Classes
    AnyRef → Any
  62. final def toTarget: ModuleTarget
    Definition Classes
    BaseModule → InstanceId
  63. val valid_control_port_to_output_values: HashMap[ValidIO[Data], ArrayBuffer[TestingEvent]]
  64. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException])
  65. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException]) @native()
  66. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException])

Deprecated Value Members

  1. def finalize(): Unit
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.Throwable]) @Deprecated
    Deprecated
  2. lazy val getPorts: Seq[Port]
    Definition Classes
    RawModule
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use DataMirror.modulePorts instead. this API will be removed in Chisel 3.6

  3. def override_clock: Option[Clock]
    Attributes
    protected
    Definition Classes
    Module
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use withClock at Module instantiation

  4. def override_clock_=(rhs: Option[Clock]): Unit
    Attributes
    protected
    Definition Classes
    Module
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use withClock at Module instantiation

  5. def override_reset: Option[Bool]
    Attributes
    protected
    Definition Classes
    Module
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use withClock at Module instantiation

  6. def override_reset_=(rhs: Option[Bool]): Unit
    Attributes
    protected
    Definition Classes
    Module
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use withClock at Module instantiation

Inherited from HWIOTester

Inherited from BasicTester

Inherited from Module

Inherited from RawModule

Inherited from BaseModule

Inherited from IsInstantiable

Inherited from HasId

Inherited from internal.InstanceId

Inherited from AnyRef

Inherited from Any

Ungrouped